A distributed data processing system includes a processing center or algorithm persistence system (“APS”), a series of remote caching nodes in electronic communication with the APS, and a series of remote computing or processing nodes in electronic communication with the remote caching nodes. Each remote caching node is mounted to a top surface of a mobile vehicle and includes a data transmitter/receiver (transceiver), computer hardware and software to operate the caching node, memory to transmit or transfer data from the APS to the remote processing nodes. The remote processing nodes include a series of electricity generating solar panels, a series of electronic data processing chips, electronic data memory, an electronic date transmitter/receiver (transceiver), and a motion sensor. The series of electronic data processing chips are preferably a tensor processing unit (TPU), which is an AI accelerator application-specific integrated circuit (ASIC) developed specifically for neural network machine learning.

A data storage device includes a memory module including a circuit board, a plurality of light emitting elements and a light guiding unit. The light emitting elements are electrically connected to the circuit board. The light guiding unit includes a light-homogenizing plate and a light output portion. The plate is disposed between the light output portion and the light emitting elements. A light diffusion space is disposed between the plate and the light output portion. The light emitted by the light emitting elements propagates sequentially into the plate, the light diffusion space, and the light output portion and then is output through the light output portion.

A system for cooling of computing components of an information handling system, including a printed circuit board (PCB); a computing card connector coupled to the PCB, the computing card connector including first mating features; a computing card coupled to the computing card connector; and a thermal plate including a first end and a second end positioned opposite to the first end, the second end including second mating features that correspond to the first mating features of the computing card connector, wherein the thermal plate is coupled to the computing card connector at the second end of the thermal plate such that the second mating features of the thermal plate are mated with the first mating features of the computing card connector.

A system for cooling of computing components of an information handling system, including a printed circuit board (PCB); a computing card connector coupled to the PCB, the computing card connector including first mating features; a computing card coupled to the computing card connector; and a thermal plate including a first end and a second end positioned opposite to the first end, the second end including second mating features that correspond to the first mating features of the computing card connector, wherein the thermal plate is coupled to the computing card connector at the second end of the thermal plate such that the second mating features of the thermal plate are mated with the first mating features of the computing card connector.

The disclosed computing device may include electronic components, at least one of which is a processor. The computing device may also include a heat sink thermally coupled to the electronic components, as well as a temperature sensor that determines the current temperature inside the computing device. The computing device may further include a controller. The processor may generate a load schedule for the electronic components based on the current temperature inside the computing device. This load schedule ensures that a maximum temperature for the heat sink is not exceeded even when the total system power load exceeds, for a short period of time, the maximum sustainable power level the heat sink can dissipate. The controller may then load the electronic components according to the generated load schedule. Various other methods, systems, and computer-readable media are also disclosed.

Examples relate to adjusting load power consumption based on a power option agreement. A computing system may receive power option data that is based on a power option agreement and specify minimum power thresholds associated with time intervals. The computing system may determine a performance strategy for a load (e.g., set of computing systems) based on a combination of the power option data and one or more monitored conditions. The performance strategy may specify a power consumption target for the load for each time interval such that each power consumption target is equal to or greater than the minimum power threshold associated with each time interval. The computing system may provide instructions the set of computing systems to perform one or more computational operations based on the performance strategy.

Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.

Example implementations relate to a host device and a method for thermal management of a removable device, such as a pluggable electronic transceiver comprising a plurality of spring fingers that provide multipoint contact conduction cooling of the removable device. The host device includes a host circuit board having a connector, and a thermal management unit having a cooling component and the plurality of spring fingers. The cooling component is coupled to a portion of the host circuit board and includes a partially protruded portion. Each of the plurality of spring fingers includes a first end coupled to the partially protruded portion, and a second end having a dry contact surface to establish a direct thermal interface with a peripheral surface of the removable device to allow waste-heat to transfer from the removable device to the cooling component through each spring finger.

There is described a spray chamber for cooling a computer processor on a circuit board. The spray chamber comprises: a wall assembly for sealable mounting on an exposed cooling surface of the computer processor defining an enclosure having a top opening and a bottom opening which opens on the top surface of the computer processor; and a lid for covering the top opening of the wall assembly in a sealable manner, the lid having a nozzle which sprays coolant that impinges on the exposed cooling surface of the computer processor.

There is described a spray chamber for cooling a computer processor on a circuit board. The spray chamber comprises: a wall assembly for sealable mounting on an exposed cooling surface of the computer processor defining an enclosure having a top opening and a bottom opening which opens on the top surface of the computer processor; and a lid for covering the top opening of the wall assembly in a sealable manner, the lid having a nozzle which sprays coolant that impinges on the exposed cooling surface of the computer processor.