A storage controller has an operating system (OS) and power control firmware configured to manage use of battery power during a power outage event. The OS specifies to the power control firmware first and second sets of physical components that should be shed by power control firmware during a two-phase vault process. Upon a power failure, the power control firmware turns off power to the first set of physical components and notifies the OS of the power failure. The OS determines whether to abort or continue the vault process. If the OS aborts the vault process, the power control firmware restores power to the first set of physical components. If the OS continues the vault process, the power control firmware turns off power to the second set of physical components, the OS saves application state, and moves all data from volatile memory to persistent memory.

A storage controller has an operating system (OS) and power control firmware configured to manage use of battery power during a power outage event. The OS specifies to the power control firmware first and second sets of physical components that should be shed by power control firmware during a two-phase vault process. Upon a power failure, the power control firmware turns off power to the first set of physical components and notifies the OS of the power failure. The OS determines whether to abort or continue the vault process. If the OS aborts the vault process, the power control firmware restores power to the first set of physical components. If the OS continues the vault process, the power control firmware turns off power to the second set of physical components, the OS saves application state, and moves all data from volatile memory to persistent memory.

A power regulator provides current to a processing unit. A clock distribution network provides a clock signal to the processing unit. A level-based droop detector monitors a voltage of the current provided to the processing unit and provides a droop detection signal to the clock distribution network in response to the voltage falling below a first threshold voltage. The clock distribution network decreases a frequency of a clock signal provided to the processing unit in response to receiving the droop detection signal. The level-based droop detector interrupts the droop detection signal that is provided to the clock distribution network in response to the voltage rising above a second threshold voltage. The clock distribution network increases the frequency of the clock signal provided to the processing unit in response to interruption of the droop detection signal.

A semiconductor device includes a switching element, a control circuit, and a first and second temperature detectors. The control circuit controls the switching element and have an overcurrent detection circuit for the switching element. The first temperature detector detects the temperature of the switching element and the second temperature detector detects the temperature of the control circuit. The control circuit includes a reference correction circuit for correcting an overcurrent reference value of the overcurrent detection circuit on the basis of a first detection value and a second detection value detected by the first and second temperature detectors and outputting a corrected overcurrent reference value.

An apparatus includes: a memory and a first processor being configured to: control an operating frequency of a second processor connected to power supply devices that receive power from one or more power source systems to an operating frequency corresponding to a power value based on information on a number of power source systems and information on a number of uninterruptable power supplies connected to the power supply devices; and control, when the number of the power source systems is two or more and an uninterruptable power supply is connected to a power supply device in each of the power source systems, the operating frequency of the second processor to an operating frequency corresponding to a power value based on a number of power supply devices normally operating in a first power source system and a number of uninterruptable power supplies in a second power source system.

An apparatus includes: a memory and a first processor being configured to: control an operating frequency of a second processor connected to power supply devices that receive power from one or more power source systems to an operating frequency corresponding to a power value based on information on a number of power source systems and information on a number of uninterruptable power supplies connected to the power supply devices; and control, when the number of the power source systems is two or more and an uninterruptable power supply is connected to a power supply device in each of the power source systems, the operating frequency of the second processor to an operating frequency corresponding to a power value based on a number of power supply devices normally operating in a first power source system and a number of uninterruptable power supplies in a second power source system.

A method of controlling a power consumption of a media stream reproducing device having a wide input voltage range power supply includes receiving a media stream and providing an output signal representative of the received media stream. A mains supply voltage of the media stream receiver is monitored and, in case the measured mains supply voltage falls below a first level the method further includes one or more of providing an output signal representative of a message indicating the reduced mains supply voltage and advising a user to reduce the power consumption of at least the media stream reproducing device, or providing an output signal controlling a first reduction of the power consumption of the media stream reproducing device, or controlling a recording device operatively connected to the media stream reproducing device to record the received media stream for later reproduction.

A power management circuit includes both a power on reset (POR) circuit and a voltage monitoring circuit. Explicit testing of these circuits is accomplished by controlling voltages applied to the circuits and monitoring an output signal responsive to a logical combination of outputs from the POR circuit and voltage monitoring circuit. The applied voltages are controlled with respect to timing of application, fixing of voltages and varying of voltages in a manner where a certain one of the circuits for explicit test is isolated with change in logic state of the output signal being indicative of operation of that isolated circuit.

A system includes a memory device and a processing device, operatively coupled to the memory device, the processing device to perform operations comprising: measuring one of a temperature voltage shift or a read bit error rate of fixed data stored in the memory device in response to detecting a power on of the memory device, the fixed data having been programmed in response to detecting a power loss; estimating an amount of time for which the memory device was powered off based on results of the measuring; and in response to the amount of time satisfying a threshold criterion, updating a value for a temporal voltage shift of a block family based on the amount of time.

In accordance with embodiments of the present disclosure, a method for power loss protection of one or more storage resources may include receiving information from each of the one or more storage resources regarding power loss protection capabilities of such storage resource. The method may also include based on the information, repurposing, for each power loss protection capable storage resource, a communications channel between a logic device and such power loss protection capable storage resource for transmission of a respective early power-off warning signal for such power loss protection capable storage resource. The method may further include in response to a power event of a power supply unit for providing electrical energy to the one or more storage resources, asserting for each power loss protection capable storage resource its respective early power-off warning signal.