In various examples, a voltage monitor may determine whether the voltage supplied to at least one component of a computing system is safe using two sets of thresholds—e.g., a high-frequency over-voltage (OV) threshold, a high-frequency under-voltage (UV) threshold, a low-frequency OV threshold, and a low-frequency UV threshold. A high-frequency voltage error detector may compare the supplied or input voltage to the high-frequency OV and UV thresholds and a low-frequency voltage error detector that may filter the supplied voltage to remove or reduce noise and then may compare the filtered voltage to the low-frequency OV and UV thresholds. Upon detecting a voltage error, a safety monitor may cause a change to an operating state of the at least one component.

A display device includes pixels electrically connected to a plurality of scan lines and a plurality of data lines, respectively, a scan driver that provides a scan signal to each of the plurality of scan lines, a voltage supply that supplies a first gate voltage to the scan driver through a first gate power line, and a voltage compensator. The voltage compensator senses a partial voltage of the first gate voltage applied to the scan driver through a feedback line. The voltage compensator compensates the first gate voltage with a second gate voltage in case that the sensed first gate voltage is greater than a first reference voltage.

A memory device may include a pin for communicating feedback regarding a supply voltage to a power management component, such as a power management integrated circuit (PMIC). The memory device may bias the pin to a first voltage indicating that a supply voltage is within a target range. The memory device may subsequently determine that a supply voltage is outside the target range and transition the voltage at the pin from the first voltage to a second voltage indicating that the supply voltage is outside the target range. The memory device may select the second voltage based on whether the supply voltage is above or below the target range.

A protection circuit, and related method, for an electronic device including a first power output interface and a second power output interface is disclosed. The protection circuit includes a first switch element, coupled between a first voltage source and the first power output interface. The detection circuit being operation to detect an output voltage value of the second power output interface to generate a detection result. The first switch element, according to the detection result, connects the first voltage source to the first power output interface to allow the first power output interface to output power to an external terminal, or disconnects the first voltage source from the first power output interface.

A memory system may include: a nonvolatile memory device comprising a plurality of memory blocks, each block having a plurality of pages, each page having a plurality of memory cells, wherein the plurality of memory block includes an SLC (Single Level Cell) block and an MLC (Multi-Level Cell) block; and a controller suitable for programming input data transmitted from a host to both the SLC block and the MLC block in response to a first program command, and invalidating the input data programmed in the SLC block at a time point when the program operation for the MLC block is completed, when the memory system is powered on after an SPO (Sudden Power-Off) occurred while the program operation was performed on both the SLC block and the MLC block, the controller may perform a recovery operation to the MLC block based on valid data programmed in the SLC block.

A memory system may include: a nonvolatile memory device comprising a plurality of memory blocks, each block having a plurality of pages, each page having a plurality of memory cells, wherein the plurality of memory block includes an SLC (Single Level Cell) block and an MLC (Multi-Level Cell) block; and a controller suitable for programming input data transmitted from a host to both the SLC block and the MLC block in response to a first program command, and invalidating the input data programmed in the SLC block at a time point when the program operation for the MLC block is completed, when the memory system is powered on after an SPO (Sudden Power-Off) occurred while the program operation was performed on both the SLC block and the MLC block, the controller may perform a recovery operation to the MLC block based on valid data programmed in the SLC block.

Methods and systems for managing a premises are disclosed. The premises may comprise a premises management device. The premises management device may be in communication with a security system. The premises management device may manage consumption by maintaining or disabling components associated with the premise management device.

Methods and systems for managing a premises are disclosed. The premises may comprise a premises management device. The premises management device may be in communication with a security system. The premises management device may manage consumption by maintaining or disabling components associated with the premise management device.

Techniques for implementing a fault-tolerant power supply are described. In an example, a system converts an alternating-current (AC) voltage to an initial direct current (DC) voltage. The system further converts the initial DC voltage to a first DC voltage and a second DC voltage. The system applies the first DC voltage to a high-priority device such as a metrology device. The system applies the second DC voltage to a low-priority or peripheral device. When the initial DC voltage is outside a voltage range, the system deactivates the second DC voltage to the lower-priority device and maintains the first DC voltage to the metrology device.

Techniques for implementing a fault-tolerant power supply are described. In an example, a system converts an alternating-current (AC) voltage to an initial direct current (DC) voltage. The system further converts the initial DC voltage to a first DC voltage and a second DC voltage. The system applies the first DC voltage to a high-priority device such as a metrology device. The system applies the second DC voltage to a low-priority or peripheral device. When the initial DC voltage is outside a voltage range, the system deactivates the second DC voltage to the lower-priority device and maintains the first DC voltage to the metrology device.