G06F7/40

HARDWARE TO PERFORM SQUARING
20240134607 · 2024-04-25 ·

Methods of calculating a square of an input number in hardware logic are described. An m-bit number is received and Booth encoding is performed on different groups of three consecutive bits selected from the input to generate an encoded value for each of the groups. For each group, the method comprises forming a truncated string from the input number, generating an updated version of the truncated number and selecting a bit string based on the encoded value, the selected bit string comprising zeros or a left-shifted version of the updated version of the truncated number sign extended to a bit-width of 2m bits. The method further comprises combining the selected bit strings and square and sign bits for each group into an addition array; and summing the bits in the addition array.

Control device for an autonomous power braking system of a vehicle and method for operating an autonomous power braking system of a vehicle
10053063 · 2018-08-21 · ·

A control device for an autonomous power braking system of a vehicle includes: an activation unit configured to (i) output a pump control signal to a pump of the braking system, taking into consideration a supplied presetting signal regarding an autonomous braking pressure buildup to be carried out, in such a way that a braking pressure in a wheel braking cylinder is increased by the activated pump, and (ii) output a brake booster control signal to an active brake booster of the braking system, taking the presetting signal into consideration, in such a way that a boosting force is exerted on at least one adjustable piston of a master brake cylinder of the braking system by the active brake booster in such a way that the braking pressure in the wheel brake cylinder is increased via an increased internal pressure in the master brake cylinder.

Electronic Wireless Binary Transmitter to a Electronic Receiver
20250068389 · 2025-02-27 ·

The Binary Transmitter and Receiver is a circuit for Binary information to travel through Air without wires from the end out FIG. 4 without wires.

The transmitter circuit and Receiver is powered by FIG. 2 (volt, current, amp), FIG. 1 (capacitance), and resistance with its information of 0 or 1 in a series or parallel circuit or both.

It was tested in wood (a box). To be housed in plastic (a polymer), tin, copper, metal or Metal alloy. To function with keys from 0-9 key punch, A-Z and special character's key punch, and other inputs and outputs

That uses switches, nor-gates, and-gate, diodes, resistors and capacitors FIGS. 1A and 1B for a functional transmitter and a functional receiver.

Mini technology is required in models for mobile traveling with Lithium batteries or non-Lithium batteries for its power source.

Pattern forming process
09658532 · 2017-05-23 · ·

A negative tone pattern is formed by coating a resist composition onto a substrate, prebaking to form a resist film, exposing the resist film to high-energy radiation, PEB the resist film in a high-humidity environment, and developing the resist film in an organic solvent developer. PEB in a high-humidity environment is effective for reducing the shrinkage of the resist film during the step and thus preventing the trench pattern from deformation.

Chemically Amplified Positive Resist Composition and Patterning Process

A chemically amplified positive resist composition is provided comprising a specific alkali-soluble polymer adapted to turn soluble in alkaline aqueous solution under the action of acid as base resin, an alkali-soluble polymer, and a photoacid generator in an organic solvent. The composition forms a resist film which can be briefly developed to form a pattern at a high sensitivity without generating dimples in pattern sidewalls.

OUTPUT BLOCK FOR VECTOR-BY-MATRIX MULTIPLICATION ARRAY
20250238479 · 2025-07-24 ·

In one example, a system comprises: a vector-by-matrix multiplication array comprising non-volatile memory cells arranged into rows and columns; and an output block coupled to the vector-by-matrix multiplication array comprising: a current-to-voltage converter to convert current received from a column of the vector-by-matrix multiplication array into a voltage, an analog-to-digital converter to convert the voltage into digital bits, and a configuration circuit to convert the digital bits into unsigned digital bits.