The present disclosure relates to a processing device including a memory configured to store data to be computed; a computational circuit configured to compute the data to be computed, which includes performing acceleration computations on the data to be computed by using an adder circuit and a multiplier circuit; and a control circuit configured to control the memory and the computational circuit, which includes performing acceleration computations according to the data to be computed. The present disclosure may have high flexibility, good configurability, fast computational speed, low power consumption, and other features.

The present disclosure provides a counting device and counting method. The device includes a storage unit, a counting unit, and a register unit, where the storage unit may be connected to the counting unit for storing input data to be counted and storing a number of elements satisfying a given condition in the input data after counting; the register unit may be configured to store an address where input data to be counted is stored in the storage unit; and the counting unit may be connected to the register unit, and may be configured to acquire a counting instruction, read a storage address of the input data to be counted in the register unit according to the counting instruction, acquire corresponding input data to be counted in the storage unit, perform statistical counting on a number of elements in the input data to be counted that satisfy the given condition, and obtain a counting result. The counting device and the method may improve the computation efficiency by writing an algorithm of counting a number of elements that satisfy a given condition in input data into an instruction form.

The present disclosure provides a computation device and method. The device may include an input module configured to acquire input data; a model generation module configured to construct an offline model according to an input network structure and weight data; a neural network operation module configured to generate a computation instruction based on the offline model and cache the computation instruction, and compute the data to be processed based on the computation instruction to obtain a computation result; and an output module configured to output a computation result. The device and method may avoid the overhead caused by running an entire software architecture, which is a problem in a traditional method.

A tool for an approach and mechanism for calculating and configuring memory mapping of trend log objects in a system, such as an HVAC. It may incorporate determining available memory of a controller for trending a unit of equipment of a system. A calculation of available records may be made for configuring and using a trend. The calculation may be made in view of the controller memory and parameters including buffer size, log interval and retention time. A change in parameters may cause a recalculation of available records. The available record terms may be regarded as being in a user-understandable format. The format may be intuitive. Anomalies of trends of equipment may lead to spotting issues of the equipment.

A processing device with dynamically configurable operation bit width, characterized by comprising: a memory for storing data, the data comprising data to be operated, intermediate operation result, final operation result, and data to be buffered in a neural network; a data width adjustment circuit for adjusting the width of the data to be operated, the intermediate operation result, the final operation result, and/or the data to be buffered; an operation circuit for operating the data to be operated, including performing operation on data to be operated of different bit widths by using an adder circuit and a multiplier; and a control circuit for controlling the memory, the data width adjustment circuit and the operation circuit. The device of the present disclosure can have the advantages of strong flexibility, high configurability, fast operation speed, low power consumption or the like.

Provided are a spin logic device based on a magnetic tunnel junction and an electronic apparatus comprising the same. According to an embodiment, the spin logic device may comprise: a current wiring; a magnetic tunnel junction, which comprises a free magnetic layer, a fixed magnetic layer, and a potential barrier layer located therebetween, which are stacked on the current wiring; and a current source for providing an input current to the current wiring, wherein the input current comprises a first, a second, and a third in-plane currents, directions of which are different from a direction of a magnetization axis of the free magnetic layer or there is a vertical component in that direction, and the first and the second in-plane currents are logical input currents while the third in-plane current is used to control the implementation mode of the spin logic device.

An integrated circuit that includes common factor mass multiplier (CFMM) circuitry is provided that multiplies a common factor operand by a large number of multiplier operands. The CFMM circuitry may be implemented as a instance specific version (where at least some portion of the hardware has to be redesigned if the multipliers change) or a non-instance specific version (where the CFMM circuitry can work with arbitrary multipliers without having to redesign the hardware). Either version can be formed on a programmable integrated circuit or an application-specific integrated circuit. The CFMM circuitry may include a multiplier circuit that effectively multiplies the common factor by predetermined fixed constants to generate partial products and may further include shifting and add/subtract circuits for processing and combining the partial products to generate corresponding final output products. CFMM circuitry configured in this way can be used to support convolution neural networks or any operation that requires a straight common factor multiply.

The number of non-zero elements is counted for each first row in a first matrix, and the maximum value therefor is determined. Pairs each containing the value and column identifier of a non-zero element are extracted from each first row, and dummy pairs are added for each first row that contains fewer non-zero elements than the maximum value, to generate compressed storage data including the same number of pairs for each first row. A second row with a row identifier corresponding to the column identifier included in each pair is extracted from a second matrix and is multiplied by the value included in the pair, to generate a row vector. By assigning an equal number of threads to each first row and summing row vectors corresponding to each first row using the assigned threads, a third matrix representing matrix multiplication between the first and second matrices is produced.

The present disclosure provides methods and systems for ensuring the security of a blockchain and associated network, and for enabling the establishment of consensus regarding the state of the blockchain. A method of the disclosure may be implemented by one or more nodes on a blockchain network, using a non-parallelisable algorithm to calculate an output based on a computational difficulty parameter, a hash of at least one blockchain transaction; and/or a hash of at least one blockchain block header. The non-parallelisable, inherently sequential algorithm comprises at least one of the following operations or a combination thereof: a recursive operation, a modular exponentiation and/or a repeated squaring operation.

A method is provided for solving a given combinatorial problem includes providing a function that has been established for a family of combinatorial problems including the given combinatorial problem. For each problem in the family, the function relates a secondary measure of the problem to a quality metric of a characteristic solution to the problem. The function may be applied to a value of the secondary measure for the given problem to obtain a value of the quality metric of the characteristic solution to the given problem. The given problem may be solved to obtain a solution to the given problem; and the solution evaluated based on comparison of a value of the quality metric of the solution, and the value of the quality metric of the characteristic solution. And in at least one instance based on the evaluation, the solution may be communicated to guide performance of a task.