Patent classifications
G06F7/64
Embedded PHY (EPHY) IP core for FPGA
The present disclosure generally relates to an embedded physical layer (EPHY) for a field programmable gate array (FPGA). The EPHY for the FPGA is for a testing device that can receive and transmit in both the high speed PHYs, as well as low speed PHYs, such as MIPI PHYS (MPHYs), to meet universal flash storage (UFS) specifications. The testing device with the EPHY for the FPGA provides flexibility to support any specification updates without the need of application specific (ASIC) production cycles.
COMBINED CHEMICAL AND VELOCITY SENSORS FOR FLUID CONTAMINATION ANALYSIS
Methods and systems for locating a chemical source include measuring chemical concentration with sensors at a plurality of different positions. Measurements from pairs of positions are cross-correlated to determine an average velocity vector for a group of positions. A convergence region is determined based on a plurality of average velocity vectors to determine a chemical source location.
COMBINED CHEMICAL AND VELOCITY SENSORS FOR FLUID CONTAMINATION ANALYSIS
Methods and systems for locating a chemical source include measuring chemical concentration with sensors at a plurality of different positions. Measurements from pairs of positions are cross-correlated to determine an average velocity vector for a group of positions. A convergence region is determined based on a plurality of average velocity vectors to determine a chemical source location.
SYSTEMS AND METHODS FOR NEURAL ORDINARY DIFFERENTIAL EQUATION LEARNED TIRE MODELS
System, methods, and other embodiments described herein relate to NODE learned tire models. In one embodiment, a method includes calculating estimated tire forces based on vehicle measurements; solving a second order differential equation in a repetitive manner until an error calculation based on a tire force function and the estimated tire forces reaches a minimum value, by: using a first predictive model to provide one or more inflection points and initial conditions based on the vehicle measurements, using a second and third predictive model to act as, respectively, exponents to a positive and a negative exponential equation based on the one or more inflection points, the initial conditions, and the vehicle measurements, and integrating the exponential equations to obtain the tire force function; and applying the tire force function to new vehicle measurements to estimate current tire forces.
SYSTEMS AND METHODS FOR NEURAL ORDINARY DIFFERENTIAL EQUATION LEARNED TIRE MODELS
System, methods, and other embodiments described herein relate to NODE learned tire models. In one embodiment, a method includes calculating estimated tire forces based on vehicle measurements; solving a second order differential equation in a repetitive manner until an error calculation based on a tire force function and the estimated tire forces reaches a minimum value, by: using a first predictive model to provide one or more inflection points and initial conditions based on the vehicle measurements, using a second and third predictive model to act as, respectively, exponents to a positive and a negative exponential equation based on the one or more inflection points, the initial conditions, and the vehicle measurements, and integrating the exponential equations to obtain the tire force function; and applying the tire force function to new vehicle measurements to estimate current tire forces.
Gated CDS integrator
A Gated CDS Integrator (GCI) may amplify low-level signals without introducing excessive offset and noise. The GCI may also amplify the low level signals with accurate and variable gain. The GCI may include a modulator preceding a linear amplifier such that offset or noise present in a signal path between the modulator and a demodulator input is translated to a higher out of band frequency.
PHASE RETRIEVAL USING COORDINATE DESCENT TECHNIQUES
Coordinate descent is applied to recover a signal-of-interest from only magnitude information. In doing so, a single unknown value is solved at each iteration, while all other variables are held constant. As a result, only minimization of a univariate quartic polynomial is required, which is efficiently achieved by finding the closed-form roots of a cubic polynomial. Cyclic, randomized, and/or a greedy coordinate descent technique can be used. Each coordinate descent technique globally converges to a stationary point of the nonconvex problem, and specifically, the randomized coordinate descent technique locally converges to the global minimum and attains exact recovery of the signal-of-interest at a geometric rate with high probability when the sample size is sufficiently large. The cyclic and randomized coordinate descent techniques can also be modified via minimization of the l.sub.1-regularized quartic polynomial for phase retrieval of sparse signals-of-interest, i.e., those signals with only a few nonzero elements.
PHASE RETRIEVAL USING COORDINATE DESCENT TECHNIQUES
Coordinate descent is applied to recover a signal-of-interest from only magnitude information. In doing so, a single unknown value is solved at each iteration, while all other variables are held constant. As a result, only minimization of a univariate quartic polynomial is required, which is efficiently achieved by finding the closed-form roots of a cubic polynomial. Cyclic, randomized, and/or a greedy coordinate descent technique can be used. Each coordinate descent technique globally converges to a stationary point of the nonconvex problem, and specifically, the randomized coordinate descent technique locally converges to the global minimum and attains exact recovery of the signal-of-interest at a geometric rate with high probability when the sample size is sufficiently large. The cyclic and randomized coordinate descent techniques can also be modified via minimization of the l.sub.1-regularized quartic polynomial for phase retrieval of sparse signals-of-interest, i.e., those signals with only a few nonzero elements.
Embedded PHY (EPHY) IP Core for FPGA
The present disclosure generally relates to an embedded physical layer (EPHY) for a field programmable gate array (FPGA). The EPHY for the FPGA is for a testing device that can receive and transmit in both the high speed PHYs, as well as low speed PHYs, such as MIPI PHYS (MPHYs), to meet universal flash storage (UFS) specifications. The testing device with the EPHY for the FPGA provides flexibility to support any specification updates without the need of application specific (ASIC) production cycles.
Embedded PHY (EPHY) IP Core for FPGA
The present disclosure generally relates to an embedded physical layer (EPHY) for a field programmable gate array (FPGA). The EPHY for the FPGA is for a testing device that can receive and transmit in both the high speed PHYs, as well as low speed PHYs, such as MIPI PHYS (MPHYs), to meet universal flash storage (UFS) specifications. The testing device with the EPHY for the FPGA provides flexibility to support any specification updates without the need of application specific (ASIC) production cycles.