Techniques are described for identifying a plurality of objects associated with a clipping mask and available for display in a user interface of a digital media editor, identifying, for each of the plurality of objects, a bounding box surrounding a respective object in the plurality of objects, each bounding box defining a plurality of anchor points configured to generate alignment guides for the respective object. The techniques may also includes determining, for each object, visible portions that are within a boundary defined by the clipping mask, determining a plurality of locations in which at least one bounding box intersects with the clipping mask within the visible portions, and triggering, in the user interface, modification of the at least one bounding box in at least one of the plurality of locations to reduce the at least one bounding box to terminate on at least one of the plurality of locations.

The present invention relates to a method for securing against N-order side-channel attacks a cryptographic process using in a plurality of encryption rounds an initial Substitution box S.sub.0 comprising the steps of: generating (E12) a first randomized substitution box S.sub.1 by masking said initial substitution box S.sub.0 such that S.sub.1(x XOR m.sub.1)=S.sub.0(x) XOR m.sub.2, with m.sub.1, m.sub.2 uniformly-distributed random values, for any input value x of the initial substitution box S.sub.0, generating (E13) a first transrandomized Substitution box S(1,1) from the first randomized substitution box S.sub.1 and from masks m.sub.1,1, m.sub.1,1 such that S(1, 1)[x]=S.sub.1[x xor (m.sub.1 xor m.sub.1,1)] xor (m.sub.2 xor m.sub.1,1) for any input value x of the first transrandomized Substitution box S(1,1), generating (E14) from the first transrandomized Substitution box S(1,1) a N1th transrandomized Substitution box S(1, N1) by performing iteratively N2 times a step of generation of a ith transrandomized Substitution box S(1, i) from a i1th transrandomized substitution box S(1, i1) and from a plurality of masks m1,i, m.sub.1,i, m.sub.1,i1, m.sub.1,i1 such that S(1, i)[x]=S(1, i1)[x xor (m.sub.1,i-1 xor m.sub.1,i)] xor (m.sub.1,i1 xor m.sub.1,i) for any input value x of the ith transrandomized substitution box S(1, i), with i an integer comprised in {2, . . . N1}, performing the cryptographic process using (E15) the N1th transrandomized Substitution box S(1, N1) instead of the initial Substitution box S.sub.0 in at least said first round of the cryptographic process.

A physically unclonable function (PUF) device is provided. The PUF device includes: a plurality of PUF cells configured to generate an output. Each of the plurality of cells includes a sense amplifier, a load circuit. The sense amplifier includes a first circuit and a second circuit configured to generate a bit line and a complementary bit line. The sense amplifier having a first circuit and a second circuit configured to generate a bit line and a complementary bit line. The first circuit generates an output at a first output node and the second circuit generates an output at the second output node. The load circuit having a first transistor and a second transistor configured to generate a bias to the sense amplifier to obtain a mask bit at a first output node and a second output node. The control terminal of the first transistor is controlled by a first selection bit, and a control terminal of the second transistor is controlled by a second selection bit. The harvester circuit includes a first transistor and a second transistor receives the input from the load and generates the difference in the input.

An apparatus and method for performing a vector permute. For example, one embodiment of a processor comprises: a source vector register to store a plurality of source data elements; a destination vector register to store a plurality of destination data elements; a control vector register to store a plurality of control data elements, each control data element corresponding to one of the destination data elements and including an N bit value indicating whether a source data element is to be copied to the corresponding destination data element; vector permute logic to compare the N bit value of each control data element to an N bit portion of an immediate to determine whether to copy a source data element to the corresponding destination data element, wherein if the N bit values match, then the vector permute logic is to identify a source data element using an index value included in the control data element and to responsively copy the source data element to the corresponding destination data element in the destination vector register.

A method performed by a database processing computer is provided. The method includes identifying a plurality of sensitivity levels associated with a plurality of data values stored in a database, and determining which of the plurality of sensitivity levels are associated with which of the plurality of data values. The method further includes generating a sensitivity-density data structure based on which of the plurality of sensitivity levels are associated with which of the plurality of data values. In this regard, the sensitivity-density data structure indicates density of sensitive data that is stored in the database for each of the plurality of sensitivity levels. In embodiments disclosed herein, the method also includes determining whether to perform a remedial action associated with controlling access by client devices to at least one of the plurality of data values based on whether the sensitivity-density data structure satisfies a defined rule.

A field programmable gate array (FPGA) including a configurable interconnect fabric connecting a plurality of logic blocks, the configurable interconnect fabric and the logic blocks being configured to implement a data masking circuit configured to: receive input data including data values at a plurality of indices of the input data; select between a data value of the data values and an alternative value using a masking multiplexer to generate masked data, the masking multiplexer being controlled by a mask value of a plurality of mask values at indices corresponding to the indices of the input data; and output the masked data. In some examples, the configurable interconnect fabric and the logic blocks are further configured to implement a mask generation circuit configured to generate the mask values. In some examples, the mask values are received from external memory.

A method includes processing, by an arithmetic and logic unit of a processor, masked data, and keeping, by the arithmetic and logic unit of the processor, the masked data masked throughout their processing by the arithmetic and logic unit. A processor includes an arithmetic and logic unit configured to keep masked data masked throughout processing of the masked data in the arithmetic and logic unit.

Systems and methods for processing data for a neural network are described. The system comprises non-transitory memory configured to receive data bits defining a kernel of weights, the data bits being suitable for processing input data; and a data processing unit, configured to: receive bits defining a kernel of weights for the neural network, the kernel of weights comprising one or more non-zero value weights and one or more zero-valued weights; generate a set of mask bits, a position of each bit in the set of mask bits corresponds to a position within the kernel of weights and the value of each bit indicates whether a weight in the corresponding position is a zero-valued weight or a non-zero value weight; and transmit the non-zero value weights and the set of mask bits for storage, the non-zero value weights and the set of mask bits represent the kernel of weights.

According to one embodiment, an execution unit is described, which includes a mask generation circuit configured to generate a mask by multiplying a mask generation vector by blocks of codewords of a plurality of cyclic codes, a masking circuit configured to mask data to be processed by means of the mask, and an arithmetic logic unit configured to process the masked data by means of additions and rotations.

A (controller area network) CAN filter combining method and a CNA controller are provided. The CAN filter includes a special filter and one or more common filters. The method includes: initializing a mask code and at least two filter codes of the special filter, acquiring a first total number of the filter codes in the special filter and a second total number of the common filters, acquiring mask codes and filter codes of the common filters, and adjusting the mask code and the filter codes of the special filter on the basis of the first total number, the second total number, and the mask codes and the filtering codes of all of the common filters. The method reduces the load of a processor, and prevents the CAN controller from processing a large amount of irrelevant data, thereby accelerating communications.