G06F8/41

DETERMINING A DISTRIBUTED SYSTEM TOPOLOGY FROM A SINGLE APPLICATION DEPLOYMENT
20230236810 · 2023-07-27 ·

Systems and methods for determining a topology of an application deployment on a distributed system can include receiving multiple traces of requests within an application, where the application includes multiple components. They can also include determining a number of times that each span between the components is traversed by a trace and associating each span with a corresponding weight reflecting the number of times that the span is traversed. Such systems and methods can further include selecting a deployment scenario based on the respective weights of each of the spans.

PROCESSOR CORES USING CONTENT OBJECT IDENTIFIERS FOR ROUTING AND COMPUTATION

Processor cores using content object identifiers for routing and computation are disclosed. One method includes executing a complex computation using a set of processing cores. The method includes routing a set of content objects using a set of content object identifiers and executing a set of instructions. The set of instructions are defined using a set of operand identifiers. The operand identifiers represent content object identifiers in the set of content object identifiers. The content objects can be routed according to a named data networking (NDN) or content-centric networking (CCN) paradigm with the content object identifiers mentioned above serving as the names for the computation data being routed by the network.

Analytic workload partitioning for security and performance optimization

The present disclosure provides privacy preservation of analytic workflows based on splitting the workflow into sub-workflows each with different privacy-preserving characteristics. Libraries are generated that provide for formatting and/or encrypting data for use in the sub-workflows and also for compiling a machine learning algorithm for the sub-workflows. Subsequently, the sub-workflows can be executed using the compiled algorithm and formatted data.

ERROR HANDLING RECOMMENDATION ENGINE

Systems and methods are disclosed herein for recommending solutions to execution errors of software packages. An error message related to compilation or execution of computer code is received and, based on a vector representation of the error message and vector representations corresponding to message threads from one or more collaborative messaging systems, a set of message threads that match the error message is identified. Furthermore, a known error message that matches the set of message threads is identified and updated computer code is generated based on the known error message. The updated computer code is then provided to a client device.

Methods and apparatus to improve disambiguation and interpretation in automated text analysis using transducers applied on a structured language space
11568150 · 2023-01-31 · ·

Methods and apparatus for automated processing of natural language text is described. The text can be preprocessed to produce language-space data that includes descriptive data elements for words. Source code that includes linguistic expressions, and that may be written in a programming language that is user-friendly to linguists, can be compiled to produce finite-state transducers and bi-machine transducers that may be applied directly to the language-space data by a language-processing virtual machine. The language-processing virtual machine can select and execute code segments identified in the finite-state and/or bi-machine transducers to disambiguate meanings of words in the text.

Automatic generation of source code implementing a regular expression

The present application discloses methods, systems, and computer program products for automatically generating source code implementing a regular expression. A regular expression that is defined within source code of an application project is identified. The source code uses a higher-level programming language. Based on identifying the regular expression, a source code implementation of the regular expression is automatically generated using the higher-level programming language, and the source code implementation of the regular expression is integrated into the application project. After integrating the source code implementation of the regular expression into the application project, the source code implementation of the regular expression is compiled into lower-level code and the lower-level code is emitted into an application executable when building the application project, or the source code implementation of the regular expression is interpreted when executing the application project.

Method and apparatus for retaining optimal width vector operations in arbitrary/flexible vector width architecture

A method and apparatus to optimize a list of vector instructions using dynamic programming, in particular memoization, by generating a table containing instruction subvectors having individual (parts), contiguous (superparts) and repeated (broadcasts) lanes. Because the instructions in the table are subvectors selected to have individual, contiguous and repeated lanes in the registers, compiler optimizations can be enhanced. Introduction of such dynamic programming allows for speculative lane optimizations, as well as improved analysis-guided optimizations, either of which can be performed alone or in combination with other optimizations, whether or not they make use of dynamic programming.

Compiler flow logic for reconfigurable architectures

The technology disclosed partitions a dataflow graph of a high-level program into memory allocations and execution fragments. The memory allocations represent creation of logical memory spaces in on-processor and/or off-processor memories for data required to implement the dataflow graph. The execution fragments represent operations on the data. The technology disclosed designates the memory allocations to virtual memory units and the execution fragments to virtual compute units. The technology disclosed partitions the execution fragments into memory fragments and compute fragments, and assigns the memory fragments to the virtual memory units and the compute fragments to the virtual compute units. The technology disclosed then allocates the virtual memory units to physical memory units and the virtual compute units to physical compute units. It then places the physical memory units and the physical compute units onto positions in the array of configurable units and routes data and control networks between the placed positions.

Hierarchies to generate animation control rigs
11715249 · 2023-08-01 · ·

An animation system is provided for generating an animation control rig for character development, configured to manipulate a skeleton of an animated character. Hierarchical representation of puppets includes groups of functions related in a hierarchy according to character specialization for creating the animated rig are derived using base functions of a core component node. The hierarchical nodes may include an archetype node, at least one appendage node, and at least one feature node. In some implementations, portions of a hierarchical node, including the functions from the core component node, may be shared to generate different animation rigs for a variety of characters. In some implementations, portions of a hierarchical node, including the component node functions, may be reused to build similar appendages of a same animation rig.

Streaming compiler for automatic adjoint differentiation
11714618 · 2023-08-01 ·

A method for operating on a target function to provide computer code instructions configured to implement automatic adjoint differentiation of the target function. The method comprises: determining, based on the target function, a linearized computational map (100), LCM, of the target function wherein each node of the LCM (100) comprises an elementary operation; for each node of the LCM (100) forming computer code instructions configured to: (i) compute intermediate data associated with a forward function of an automatic adjoint differentiation algorithm; and, (ii) increment, according to the automatic adjoint differentiation algorithm, adjoint variables of the preceding connected nodes of the each node in dependence on intermediate data; wherein forming computer code instructions for both step (i) and step (ii) for each node is performed prior to performing said steps for a subsequent node of the LCM (100).