Patent classifications
G06F8/41
Systems and methods for assisted code development
The present invention generally relates to the field of automated and flexible information extraction for assisted and streamlined development of computer code. The invention provides for accommodating coding representations of reusable utilities in a technology agnostic pattern so that, based on a specified coding stack, the technology agnostic embeddings can be decoded and deployed into developers' integrated development environment. The present invention includes a technologic agnostic digital wallet for developers capable of storing reusable components either from open source repositories or user-defined functions in an embedded pattern in a centralized storage platform such as cloud or hosted virtual desktop.
Distributed extensible dynamic graph
A method may include receiving a first definition of an object type from a first software component and a second definition of the object type from a second software component. The object type may be labeled by an ID. The method may further include storing, in a dynamic graph, a node labeled by the ID, and storing, in a type definition repository external to the dynamic graph, the first definition of the object type and the second definition of the object type. The method may further include receiving, from the first software component, a modified first definition of the object type. The method may further include replacing, in the type definition repository and using the ID, the first definition of the object type with the modified first definition, and transmitting, to the second software component, a message indicating a need to lookup, by the ID, the modified first definition.
System for software compiler integrity verification
Systems, computer program products, and methods are described herein for software compiler integrity verification. The present invention is configured to retrieve, from a source code repository, a source code; process, using a first build machine, the source code into a first object code; process, using a second build machine, the source code into a second object code; initiate an integrity verification engine on the first object code and the second object code; decompile, using the integrity verification engine, the first object code to create a first decompiled object code and the second object code to create a second decompiled object code; compare the first decompiled object code with the second decompiled object code; determine a match between the first decompiled object code and the second decompiled object code; and transmit an approval notification.
Mixed mode programming
A mixed mode programming method permitting users to program with graphical coding blocks and textual code within the same programming tool. The mixed mode preserves the advantages of graphical block programming while introducing textual coding as needed for instructional reasons and/or for functional reasons. Converting a graphical code block or group of blocks to a textual block lets the user see a portion of the textual code in the context of a larger program. Within one programming tool the mixed mode method allows users to learn programming and build purely graphical blocks; then transition into mixed graphical and textual code and ultimately lead to their ability to program in purely textual code. The mixed mode further allows users to program using any combination of drag-and-drop graphical blocks and typed textual code in various forms.
Architecture exploration and compiler optimization using neural networks
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for optimizing integrated circuit architectures or compiler designs using an optimization engine. The optimization engine includes an auto-encoder and one or more regressors. Once trained, the optimization engine can encode initial, discrete input values of a set of input characteristics into a continuous domain and use continuous optimization techniques to identify final input values of the set of input characteristics that optimize one or more output characteristics.
Architecture exploration and compiler optimization using neural networks
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for optimizing integrated circuit architectures or compiler designs using an optimization engine. The optimization engine includes an auto-encoder and one or more regressors. Once trained, the optimization engine can encode initial, discrete input values of a set of input characteristics into a continuous domain and use continuous optimization techniques to identify final input values of the set of input characteristics that optimize one or more output characteristics.
Transportation of configuration data with error mitigation
A method for mitigating errors in the transportation of configuration data may include identifying, at a development system, dependent configuration data associated with a first transport request. The dependent configuration data may implement a customization to a software application hosted at a production system. A reference table identifying the dependent configuration data may be sent to the production system. A missing object list identifying dependent configuration data absent from the production system may be generated at the production system based on the reference table. The missing object list may be sent to the development system where a corrective action may be performed such that the dependent configuration data identified by the missing object list as being absent from the production system is sent to the production system in the first transport request and/or a second transport request. Related systems and articles of manufacture, including computer program products, are also provided.
Configurable delay insertion in compiled instructions
Techniques are disclosed for utilizing configurable delays in an instruction stream. A set of instructions to be executed on a set of engines are generated. The set of engines are distributed between a set of hardware elements. A set of configurable delays are inserted into the set of instructions. Each of the set of configurable delays includes an adjustable delay amount that delays an execution of the set of instructions on the set of engines. The adjustable delay amount is adjustable by a runtime application that facilitates the execution of the set of instructions on the set of engines. The runtime application is configured to determine a runtime condition associated with the execution of the set of instructions on the set of engines and to adjust the set of configurable delays based on the runtime condition.
Dynamic updating of query result displays
Described are methods, systems and computer readable media for dynamic updating of query result displays.
Dynamic updating of query result displays
Described are methods, systems and computer readable media for dynamic updating of query result displays.