Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation

Maintaining core dump privacy during application fault handling. A core memory dump is received for an application from a runtime engine. Areas of the core memory dump are analyzed to identify structural data in the form of internal structures of the runtime engine. The identified structural data is retained in a modified core memory dump, and remaining non-structural data in the areas of the core memory dump is processed to ensure it is not readable by unauthorized entities in the modified core memory dump. The modified core memory dump is outputted for fault analysis.

An improved pivot controller is described that solves existing deficiencies in pivot controllers. Specifically, a pivot controller that can interface with either a hot or neutral safety, detect failed contactors and relays, and verify the safety control circuit is described. The described improved pivot controller permits easier installation, safer operation, and faster diagnostics than existing pivot controllers.

A plant control device of the present invention includes a register configured to register a simulated dangerous condition which is a simulated representation of an operation condition under which a plant is dangerous, a first acquirer configured to acquire an operation condition of the plant, a learner configured to learn the operation condition acquired and the simulated dangerous condition registered and produce an operation model of the plant, a determiner configured to determine an operation parameter of the plant on the basis of the operation condition acquired and the operation model produced, and an instructor configured to instruct an operation of the plant on the basis of the operation parameter determined.

Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation.

A cloud oversubscription system comprising an overload detector configured to model a time series of data of at least one virtual machine on a host as a vector-valued stochastic process including at least one model parameter, the overload detector communicating with an inventory database, the overload detector configured to obtain an availability requirement for each of the at least one virtual machine; a model parameter estimator communicating with the overload detector, the model parameter estimator communicating with a database containing resource measurement data for at least one virtual machine on a host at a selected time interval, the model parameter estimator is configured to estimate the at least one model parameter from the resource measurement data; a loading assessment module communicating with the model parameter module to obtain the at least one model parameter for each of the at least one host running at least one virtual machine and determine a probability of overload based on the at least one model parameter, wherein the loading assessment module communicates the probability of overload to the overload detector; wherein the overload detector compares the probability of overload to the availability requirement to identify a probable overload condition value; and wherein the overload detector communicates the probable overload condition value to a recommender, wherein the recommender generates an alert when the overload condition value exceeds the service level agreement requirements for any of the at least one virtual machine.

Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation.

A method and system that efficiently selects sensors without requiring advanced expertise or extensive experience even in a case of new machines and unknown failures. An abnormality detection system includes a storage unit for storing a latent variable model and a joint probability model, an acquisition unit for acquiring sensor data that is output by a sensor, a measurement unit for measuring the probability of the sensor data acquired by the acquisition unit based on the latent variable model and the joint probability model stored by the storage unit, a determination unit for determining whether the sensor data is normal or abnormal based on the probability of the sensor data measured by the measurement unit, and a learning unit for learning the latent variable model and the joint probability model based on the sensor data output by the sensor.

Systems, methods, and computer-readable storage media configured to predict future system failures are disclosed. Performance metrics (e.g., key performance indicators (KPIs)) of a system may be monitored and machine learning techniques may utilize a trained model to evaluate the performance metrics and identify trends in the performance metrics indicative of future failures of the monitored system. The predicted future failures may be identified based on combinations of different performance metrics and the impact that the performance metric trends of the group of different performance metrics will have on the system in the future. Upon predicting that a system failure will occur, operations to mitigate the failure may be initiated. The disclosed embodiments may improve overall performance of monitored systems by: increasing system uptimes (i.e., availability); helping systems administrators maintain the monitored systems in a healthy state; and ensuring the functionality those systems provide is readily available to system users.

Various embodiments herein each include at least one of systems, devices, methods, and software for forced device reinitialization without mandatory restart. One method embodiment includes receiving, by a first device, a first data communication and responding, by the first device, to the first data communication with a second data communication identifying a state of the first device as a reset state. This embodiment further includes receiving, by the first device in response to the second data communication, a third data communication including data to alter the state of the first device from the reset state to a programmed state. Such embodiments may then implement the data of the third data communication to place the first device in the programmed state.