An integrated circuit (IC) chip can include a given core at a position in the IC chip that defines a given orientation, wherein the given core is designed to perform a particular function. The IC chip can include another core designed to perform the particular function. The other core can be flipped and rotated by 180 degrees relative to the given core such that the other core is asymmetrically oriented with respect to the given core. The IC chip can also include a compare unit configured to compare outputs of the given core and the other core to detect a fault in the IC chip.

A method detects and localizes a failure of a measurement acquisition channel in an acquisition system including two redundant acquisition channels for the measurement of a physical quantity in an environment. The method uses a processor with a memory storing a model including modeled values of the physical quantity based on measurements of other physical quantities in the environment. The method includes detecting a symptomatic error of a defective acquisition channel when a deviation between the measured values of the two channels reaches a detection threshold, waiting to let the acquisition system evolve for a certain period, and localizing the defective channel among the two channels, when the deviation of the values measured between the channels reaches a localization threshold different from the detection threshold. The localization is made from the comparison of the measured value of each of the channels with a modeled value of the physical quantity.

A method, system, and computer program product for maintaining data centers obtain input data; communicate an update request associated with the input data to a node of a plurality of nodes; receive an indication that the update request failed; communicate a result request for result data associated with processing of the input data to the node of the plurality of nodes until the result data associated with processing of the input data is received; and in response to receiving the result data associated with processing of the input data from the node, process the result data.

Failover methods and systems for a storage environment are provided. During a takeover operation to take over storage of a first storage system node by a second storage system node, the second storage system node copies information from a first storage location to a second storage location. The first storage location points to an active file system of the first storage system node, and the second storage location is assigned to the second storage system node for the takeover operation. The second storage system node quarantines storage space likely to be used by the first storage system node for a write operation, while the second storage system node attempts to take over the storage of the first storage system node. The second storage system node utilizes information stored at the second storage location during the takeover operation to give back control of the storage to the first storage system node.

A computing device for use in a distributed storage network (DSN) to recover corrupt encoded data slices. The computing device requests, from storage units of the DSN, encoded data slices corresponding to a data segment. In response, the computing device receives at least a decode threshold number of encoded data slices and at least one integrity error message that provides an indication of a corrupt encoded data slice, such that less than a decode threshold number of valid slices is received. Utilizing at least one correction approach involving stored integrity data, the computing device corrects the corrupt slice(s) to produce a decode threshold number of encoded data slices in order to decode the corresponding data segment. A variety of correction approaches may be employed, including a multi-stage approach that utilizes data from both valid and invalid slices.

An electronic apparatus may include a processor configured to store data of a user process related to a user area assigned to a first memory or a system process related to a system area assigned to the first memory in a second memory, in response to a memory recovery event for the first memory, and allow an area of the first memory corresponding to at least one of the user area or the system area to store other data, restore the data stored in the second memory to the first memory, in response to a data restoration event based on an access of a first process to the data stored in the second memory, and perform one of restoration of the data based on the access of the first process and restoration of the data based on an access of the second process and prevent the other one from being performed, in response to identification of the access of the second process during the access of the first process to the data stored in the second memory through the system area.

A multicore system according to one or more embodiments is disclosed, which may include processors that execute processing different from each other, a selector that selects one of the processors, a checker processor, a comparator that compares an external state of the processor selected by the selector with an external state of the checker processor, or compares an internal state of the processor selected by the selector with an internal state of the checker processor, and a controller that determines that the selected processor or the checker processor is abnormal in response to the external states or the internal states not matching each other based on comparison results obtained by the comparator.

A multicore system according to one or more embodiments is disclosed, which may include processors that execute processing different from each other, a selector that selects one of the processors, a checker processor, a comparator that compares an external state of the processor selected by the selector with an external state of the checker processor, or compares an internal state of the processor selected by the selector with an internal state of the checker processor, and a controller that determines that the selected processor or the checker processor is abnormal in response to the external states or the internal states not matching each other based on comparison results obtained by the comparator.

An electronic control device includes: a diagnostic circuit unit configured to be reconfigurable so as to be used to diagnose each of a plurality of processing circuits that processes an input signal; an input data storage unit configured to temporarily store the input signal; an output data storage unit configured to temporarily store an output signal of the plurality of processing circuits; a reconfiguration control unit configured to sequentially write, to the diagnostic circuit unit as circuit configuration information, circuit information the same as that of the plurality of processing circuits; a diagnostic control unit configured to cause the diagnostic circuit unit to perform calculation using the input signal stored in the input data storage unit when the circuit configuration information is written to the diagnostic circuit unit; and a comparator configured to diagnose each of the plurality of processing circuits by comparing output of the diagnostic circuit unit and the output signal stored in the output data storage unit.

A network device includes at least one processor, a storage device and at least one memory including computer program code. The at least one memory and the computer program code are configured to, with the at least one processor, cause the network device to: write data to the storage device; replicate the data at one or more remote network devices via at least one deterministic transmission medium; and output an acknowledgement in response to determining that the data has been written to the storage device prior to receiving confirmation of successful replication of the data at the one or more remote network devices. The methods, systems or computer readable mediums leverage the deterministic and measurable nature of the transmission media to reduce the Recover Point Objective durations.