Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation

Utilizing multiple redundancy schemes within a unified storage element, including: receiving, in a storage system at a unified storage element that integrates both fast durable storage and bulk durable storage, a data storage operation from a host computer; storing, in accordance with a first data resiliency technique that corresponds to a RAID N+R format, data corresponding to the data storage operation within the fast durable storage of the unified storage element; and responsive to determining that the complete RAID stripe has been written to the fast durable storage, moving a portion of the stored data from the fast durable storage to the bulk durable storage of the unified storage element, the bulk durable storage storing the data in accordance with a second data resiliency technique that corresponds to a RAID M+R format, wherein M is different from N.

An integrated circuit (IC) chip can include a given core at a position in the IC chip that defines a given orientation, wherein the given core is designed to perform a particular function. The IC chip can include another core designed to perform the particular function. The other core can be flipped and rotated by 180 degrees relative to the given core such that the other core is asymmetrically oriented with respect to the given core. The IC chip can also include a compare unit configured to compare outputs of the given core and the other core to detect a fault in the IC chip.

An integrated circuit (IC) chip can include a given core at a position in the IC chip that defines a given orientation, wherein the given core is designed to perform a particular function. The IC chip can include another core designed to perform the particular function. The other core can be flipped and rotated by 180 degrees relative to the given core such that the other core is asymmetrically oriented with respect to the given core. The IC chip can also include a compare unit configured to compare outputs of the given core and the other core to detect a fault in the IC chip.

Disclosed embodiments relate to perform operations for receiving and integrating a delta file in a vehicle. Operations may include receiving, at an Electronic Control Unit (ECU) in the vehicle, a delta file, the delta file comprising a plurality of deltas corresponding to a software update for software on the ECU and startup code for executing the delta file in the ECU; executing the delta file, based on the startup code, in the ECU; and updating memory addresses in the ECU to correspond to the plurality of deltas from the delta file.

A method including executing a portion of a service which is part of at least one service provided by a system including a distributed computing platform; determining object capability parameters required to perform the executing; storing information about at least one target host device; generating an announcement message reporting presence of a service type and the object capability parameters; receiving information from other announcement messages; evaluating current host device capability parameters with respect to the object capability parameters; determining when the current host device capability parameters meet a criterion; initiating a migration request message from the object for migration of the object, the object including software code and processing instructions and service function instructions, the migration to a target object host device, when the module capability parameters meet a criterion; and managing the migration of the object to the target host device.

A log-structured data store implementing data backup may implement variable data replication. Write requests may be received at different storage nodes maintaining respective replicas of a portion of a log for data maintained in the log-structured data store. Log records indicating the write requests may be stored in the respective replicas of the log portions at the different storage nodes. The log records may be sent to a backup data store to be durability persisted as part of an archived version of the log. At some of the storage nodes, in response to determining that the log records have been durably persisted in the backup data store, storage space for the log records may be reclaimed. In other remaining storage nodes, the log records may be retained and made accessible for servicing read requests.

A method for predicting a time-to-failure of a target storage device may include training a machine learning scheme with a time-series dataset, and applying the telemetry data from the target storage device to the machine learning scheme which may output a time-window based time-to-failure prediction. A method for training a machine learning scheme for predicting a time-to-failure of a storage device may include applying a data quality improvement framework to a time-series dataset of operational and failure data from multiple storage devices, and training the scheme with the pre-processed dataset. A method for training a machine learning scheme for predicting a time-to-failure of a storage device may include training the scheme with a first portion of a time-series dataset of operational and failure data from multiple storage devices, testing the machine learning scheme with a second portion of the time-series dataset, and evaluating the machine learning scheme.

A method for predicting a time-to-failure of a target storage device may include training a machine learning scheme with a time-series dataset, and applying the telemetry data from the target storage device to the machine learning scheme which may output a time-window based time-to-failure prediction. A method for training a machine learning scheme for predicting a time-to-failure of a storage device may include applying a data quality improvement framework to a time-series dataset of operational and failure data from multiple storage devices, and training the scheme with the pre-processed dataset. A method for training a machine learning scheme for predicting a time-to-failure of a storage device may include training the scheme with a first portion of a time-series dataset of operational and failure data from multiple storage devices, testing the machine learning scheme with a second portion of the time-series dataset, and evaluating the machine learning scheme.

Different embodiments of local redundancy decoder circuits that can be used in a memory device are disclosed. The different types of local redundancy decoder circuits are operably connected to the columns of memory cells in a memory array.