Patent classifications
G06F11/16
Variable Redundancy For Metadata In Storage Systems
Variable redundancy for metadata in storage systems, including: gathering information describing one or more failure characteristics for a plurality of storage devices of a storage system; determining, based on the one or more failure characteristics, a degree of redundancy for metadata stored in the storage system; and applying the degree of redundancy to the metadata.
REDUNDANCY SCHEMES FOR REPAIRING COLUMN DEFECTS
A memory device is provided that includes a memory array including a first array, a first redundant array that is local to the first array, a second array, and a second redundant array that is local to the second array, a cache array including a first cache, a first redundant cache that is local to the first cache, a second cache and a second redundant cache that is local to the second cache, and circuits comprising logic to execute operations. The operations include, responsive to an identification of a defective column in the first array, performing a local defect write repair and responsive to an identification of another defective column in the first array and a determination that the first redundant array is fully utilized, performing a global defect write repair by transferring data into the second redundant array through the first cache and the second redundant cache.
Apparatuses systems and methods for automatic soft post package repair
Embodiments of the disclosure are drawn to apparatuses and methods for automatic soft post-package repair (ASPPR). A memory may receive a row address along with a signal indicating an ASPPR operation, such as a bad page flag being set. A word line engine generates a physical address based on the row address, and ASPPR registers stores the physical address. The time it takes from receiving the row address to storing the physical address may be within the timing of an access operation on the memory such as tRAS. The row address may specify a single page of information. If the bad page flag is set, then a subsequent PPR operation may blow fuses to encode the physical address stored in the ASPPR registers.
Apparatuses systems and methods for automatic soft post package repair
Embodiments of the disclosure are drawn to apparatuses and methods for automatic soft post-package repair (ASPPR). A memory may receive a row address along with a signal indicating an ASPPR operation, such as a bad page flag being set. A word line engine generates a physical address based on the row address, and ASPPR registers stores the physical address. The time it takes from receiving the row address to storing the physical address may be within the timing of an access operation on the memory such as tRAS. The row address may specify a single page of information. If the bad page flag is set, then a subsequent PPR operation may blow fuses to encode the physical address stored in the ASPPR registers.
Detecting anomalies online using controller processing activity
Disclosed embodiments relate to identifying Electronic Control Unit (ECU) anomalies in a vehicle. Operations may include monitoring, in the vehicle, data representing real-time processing activity of the ECU; accessing, in the vehicle, historical data relating to processing activity of the ECU, the historical data representing expected processing activity of the ECU; comparing, in the vehicle, the real-time processing activity data with the historical data, to identify at least one anomaly in the real-time processing activity of the ECU; and implementing a control action for the ECU when the at least one anomaly is identified.
LOCK-STEPPING ASYNCHONOUS LOGIC
Methods and systems to detect a metastable condition and suppress/mask a signal during the metastable condition. The metastable condition may arise from asynchronous sampling. Techniques disclosed herein may be configured to enable asynchronous lock-stepping, where outputs of redundant circuit blocks of a first clock domain are received at input nodes of a second clock domain. In the second clock domain, logic states at the input nodes are compared to detect errors, and results of the comparison are masked during transitions at the input nodes. Masking may be constrained to situations where logic states at the input nodes differ.
METHOD AND APPARATUS FOR REPAIRING GPU VIDEO MEMORY ACCESS BASED ON ACTIVE ERROR DETECTION
It is suitable for the field of computer graphic processing technologies, and provides a method and apparatus for repairing a graphics processing unit (GPU) video memory access based on active error detection. A small video memory is first distributed and used for error detection of video memory access, and a problem of video memory data access abnormality is found in time through a regular active detection. When the video memory data access abnormality is found, a GPU desktop driving module can suspend a display picture update operation, and a GPU kernel driving module first suspends all video memory access, then re-initializes a video memory controller and repairs the video memory access abnormality, and then restores an access of all the modules to a video memory to normal, refreshes a desktop, and restores a graphic desktop to a normal state.
TWO-WAY REAL TIME COMMUNICATION SYSTEM THAT ALLOWS ASYMMETRIC PARTICIPATION IN CONVERSATIONS ACROSS MULTIPLE ELECTRONIC PLATFORMS
Methods, systems, and apparatuses, including computer programs encoded on computer-readable media, for receiving a first communication request, from a web browser of a user. A first responder requests information and a response to the request for information is received as part of a conversation. A conversation identifier is used to store the conversation. Based on the conversation, the conversation is determined to stop and a second responder is identified. The conversation is then transferred to the second responder.
Failover methods and system in a networked storage environment
Failover methods and systems for a storage environment are provided. During a takeover operation to take over storage of a first storage system node by a second storage system node, the second storage system node copies information from a first storage location to a second storage location. The first storage location points to an active file system of the first storage system node, and the second storage location is assigned to the second storage system node for the takeover operation. The second storage system node quarantines storage space likely to be used by the first storage system node for a write operation, while the second storage system node attempts to take over the storage of the first storage system node. The second storage system node utilizes information stored at the second storage location during the takeover operation to give back control of the storage to the first storage system node.
Data loss recovery in a secondary storage controller from a primary storage controller
A secondary storage controller determines one or more tracks of one or more volumes in which data loss has occurred in the secondary storage controller. The secondary storage controller suspends a peer to peer remote copy operation between the secondary storage controller and a primary storage controller. Information on the one or more tracks of the one or more volumes in which the data loss has occurred is transmitted to the primary storage controller.