An apparatus includes a memory sub-system comprising a plurality of memory blocks and a memory block defect detection component. The memory block defect detection component is to set, for a memory block among the plurality of memory blocks, a first block defect detection rate and determine whether the first block defect detection rate is greater than a threshold block defect detection rate for the at least one memory block. In response to a determination that the first block defect detection rate is greater than the threshold block defect detection rate for the memory block, the memory block defect detection component is to assert a program command on the memory block determine whether a program operation associated with assertion of the program command on the at least one memory block is successful. In response to a determination the program operation is unsuccessful, the memory block defect detection component is to determine that a failure involving a plane associated with the memory block and another plane of the memory sub-system has occurred.

An apparatus includes a memory sub-system comprising a plurality of memory blocks and a memory block defect detection component. The memory block defect detection component is to set, for a memory block among the plurality of memory blocks, a first block defect detection rate and determine whether the first block defect detection rate is greater than a threshold block defect detection rate for the at least one memory block. In response to a determination that the first block defect detection rate is greater than the threshold block defect detection rate for the memory block, the memory block defect detection component is to assert a program command on the memory block determine whether a program operation associated with assertion of the program command on the at least one memory block is successful. In response to a determination the program operation is unsuccessful, the memory block defect detection component is to determine that a failure involving a plane associated with the memory block and another plane of the memory sub-system has occurred.

A system is provided to receive a first request to write data to a storage system, which comprises an MRAM, a NOR, a DRAM, and a NAND. The system writes the data to the MRAM. The system copies the data from the MRAM: to the NOR in response to determining that the data is read at a frequency greater than a first predetermined threshold and is updated at a frequency less than a second predetermined threshold; to the DRAM in response to determining that the data is read at a frequency less than the first predetermined threshold and is updated at a frequency greater than the second predetermined threshold; and to the NAND in response to determining that the data is read at a frequency less than the first predetermined threshold and is updated at a frequency less than the second predetermined threshold.

Disclosed embodiments relate to perform operations for receiving and integrating a delta file in a vehicle. Operations may include receiving, at an Electronic Control Unit (ECU) in the vehicle, a delta file, the delta file comprising a plurality of deltas corresponding to a software update for software on the ECU and startup code for executing the delta file in the ECU; executing the delta file, based on the startup code, in the ECU; and updating memory addresses in the ECU to correspond to the plurality of deltas from the delta file.

Disclosed embodiments relate to adjusting vehicle Electronic Control Unit (ECU) software versions. Operations may include receiving a prompt to adjust an ECU of a vehicle from executing a first version of ECU software to a second version of ECU software; configuring, in response to the prompt and based on a delta file corresponding to the second version of ECU software, the second version of ECU software on the ECU in the vehicle for execution; and configuring, in response to the prompt, the first version of ECU software on the ECU in the vehicle to become non-executable.

Methods, systems, and apparatuses, including computer programs encoded on computer-readable media, for receiving a first communication as part of a conversation, from an unauthenticated user of a web browser. A conversation identifier is determined based on the first communication. A first responder, a communication protocol, and a communication address of the first responder is determined. The first communication is sent to the first responder and a first reply is received. The conversation identifier is determined based on the first reply and the first reply is mapped to the web browser. The first reply is sent to the web browser.

Methods, systems, and apparatuses, including computer programs encoded on computer-readable media, for receiving a first communication as part of a conversation, from an unauthenticated user of a web browser. A conversation identifier is determined based on the first communication. A first responder, a communication protocol, and a communication address of the first responder is determined. The first communication is sent to the first responder and a first reply is received. The conversation identifier is determined based on the first reply and the first reply is mapped to the web browser. The first reply is sent to the web browser.

Disclosed embodiments relate to perform operations for receiving and integrating a delta file in a vehicle. Operations may include receiving, at an Electronic Control Unit (ECU) in the vehicle, a delta file, the delta file comprising a plurality of deltas corresponding to a software update for software on the ECU and startup code for executing the delta file in the ECU; executing the delta file, based on the startup code, in the ECU; and updating memory addresses in the ECU to correspond to the plurality of deltas from the delta file.

Disclosed embodiments relate to identifying Electronic Control Unit (ECU) anomalies in a vehicle. Operations may include monitoring, in the vehicle, data representing real-time processing activity of the ECU accessing, in the vehicle, historical data relating to processing activity of the ECU, the historical data representing expected processing activity of the ECU; comparing, in the vehicle, the real-time processing activity data with the historical data, to identify at least one anomaly in the real-time processing activity of the ECU; and implementing a control action for the ECU when the at least one anomaly is identified.

Distributed processors and methods for compiling code for execution by distributed processors are disclosed. In one implementation, a distributed processor may include a substrate; a memory array disposed on the substrate; and a processing array disposed on the substrate. The memory array may include a plurality of discrete memory banks, and the processing array may include a plurality of processor subunits, each one of the processor subunits being associated with a corresponding, dedicated one of the plurality of discrete memory banks. The distributed processor may further include a first plurality of buses, each connecting one of the plurality of processor subunits to its corresponding, dedicated memory bank, and a second plurality of buses, each connecting one of the plurality of processor subunits to another of the plurality of processor subunits.