A memory controller capable of detecting a code having an error among codes stored in a Read Only Memory (ROM) controls a memory device. The memory controller includes: a code memory for storing codes used to perform an operation; a code executor for executing the codes stored in the code memory to perform the operation; a debug controller for setting a suspend code address for suspending the execution of the codes used to perform the operation; an initialization controller for controlling an initialization operation of at least one of the debug controller and the code executor; and an interfacing component for receiving a suspend code setting request corresponding to an operation of setting the suspend code address and providing the received suspend code setting request to the debug controller.

A method and/or system for checking the bus/interface between a host and a memory system during memory access operations includes a memory system having one or more of the data memory devices and a spare memory device; providing a bus/interface between a host and the memory system; selecting information on a per memory device basis to associate with a spare memory device; disassociating the selected information from the one or more data memory devices and associating the selected information with the spare memory device; adding Cyclical Redundancy Check (CRC) code to the one or more data memory devices from which the selected information was disassociated; transferring the CRC code and information over the bus and interface between the host and the memory system; and checking the bus interface with the CRC code added to the one or more data memory devices.

Provided herein is a storage node of a distributed storage system and a method of operating the same. A memory controller may include a data controller configured to receive a write request and write data corresponding to the write request from a host, and configured to determine a physical address of a memory block in which the write data is to be stored based on chunk type information included in the write request, a memory control component configured to provide a program command for instructing the memory block to store the write data, the physical address, and the write data to the memory device, wherein the chunk type information is information about whether the write data indicates a type of data chunks or a type of coding chunks, the data chunks and the coding chunks being generated by the host performing an erasure coding operation on original data.

An example networked computing system comprises a node cluster; a database; at least one processor configured by instructions to perform operations in a method of node level recovery, the method comprising operations including at least: identifying a failed node among existing nodes in the node cluster; identifying and initiating a replacement node as a new node for the node cluster; accessing at the database a logical backup of the node cluster; retrieving logical backup data of the node cluster from the logical backup and applying a node level filter to identify rows of backup data associated with the failed node; and restoring the data rows identified by the node level filter to the new node.

A method, system, and computer program product for maintaining data centers obtain input data; communicate an update request associated with the input data to a node of a plurality of nodes; receive an indication that the update request failed; communicate a result request for result data associated with processing of the input data to the node of the plurality of nodes until the result data associated with processing of the input data is received; and in response to receiving the result data associated with processing of the input data from the node, process the result data.

A method for managing a persistent storage system includes obtaining, by a first node in a node cluster, a write request, wherein the node cluster comprises the first node and a second node, processing the write request, storing data associated with the write request in a persistent storage system, updating a block-based change list based on the storing, making a first determination that a synchronization schedule is triggered, and in response to the first determination: initiating a block-based change list synchronization to the second node.

In general, the invention relates to a method for managing data. The method includes detecting a failure of a persistent storage device in a data node of a plurality of data nodes, and in response to the detecting, initiating a rebuilding of data in a spare location using proactive copy metadata and slice metadata, wherein the data is a copy of data that was stored in the persistent storage device.

The controlling apparatus for an industrial product of this disclosure has a couple of microcomputers each of which has a CPU and a memory and each of which runs the same controlling program as well as the same diagnostic program sequence parallelly and simultaneously. After the CPU of the microcomputer writes the calculated result of the diagnostic program sequence in the predetermined area of the storing area for monitoring value, such CPU send the same calculated result to the other one of the microcomputers (receiving microcomputer). The CPU of the receiving microcomputer makes a diagnosis for finding whether or not the received result is identical with its own calculated result.

In general, the invention relates to a method for managing data. The method includes detecting a persistent storage device failure in a persistent storage device of a plurality of persistent storage devices, and in response to the detecting, initiating a rebuilding of data in a spare persistent storage device using checkpoint metadata and slice metadata, wherein the data is a copy of data that was stored in the persistent storage device and wherein the spare persistent storage device is not one of the plurality of persistent storage device.

Methods, systems, and devices for erasure decoding for a memory device are described. In accordance with the described techniques, a memory device may be configured to identify conditions associated with an erasure, a possible erasure, or an otherwise indeterminate logic state (e.g., of a memory cell, of an information position of a codeword). Such an identification may be used to enhance aspects of error handling operations, including those that may be performed at the memory device or a host device (e.g., error handling operations performed at a memory controller external to the memory device). For example, error handling operations may be performed using speculative codewords, where information positions associated with an indeterminate or unassigned logic state are assigned with a respective assumed logic state, which may extend a capability of error detection or error correction compared to handling errors with unknown positions.