A failure insertion unit for connection to an object under test connected to a bus or network interface, wherein the object under test can be subjected by means of the failure insertion unit to fault voltages that are greater than the maximum voltage for which the bus or network interface is designed, with a fuse circuit which protects a bus or network interface connected to the failure insertion unit from voltages that are greater than the maximum voltage for which the bus or network interface is designed. This provides a way to be able to use failure insertion units even in systems that work with buses with high bandwidths without the risk of damaging bus or network interfaces due to overvoltages.