Embodiments disclose techniques for scheduling test cases without regeneration to verify and validate a computing system. In one embodiment, a testing engine generates a test case for a plurality of processors. Each test case includes streams of instructions. The testing engine also allocates at least one cache line associated with the streams of instructions of the generated test case such that each of the plurality of processors accesses different memory locations within the at least one cache line. The testing engine further schedules the generated test case for execution by the plurality of processors to achieve at least a first test coverage among the plurality of processors. The testing engine further re-schedules the generated test case for re-execution by the plurality of processors to achieve at least a second test coverage among the plurality of processors.

The present disclosure generally relates to validating memory devices. Rather than using debug hardware (HW) to consume, record, and decode firmware (FW) events, standard non-volatile memory express (NVMe) asynchronous event request (AER) and NVMe asynchronous event notification (AEN) is used. The NVMe AER results in initiating a particular function to be performed by a device under test (DUT) and triggering a cross feature (CF) that should at least partially overlap in time with the particular function. Using NVMe AER and AEN will eliminate the need for debug HW, reduce FW custom logic, and reduce latency.

Various technologies described herein pertain to controlling reconfiguration of a dependency graph for coordinating reconfiguration of a computing device. An operation can be performed at the computing device to detect whether an error exists in the dependency graph for a desired configuration state. The dependency graph for the desired configuration state specifies interdependencies between configurations of a set of features. An error can be detected to exist in the dependency graph when the desired configuration state differs from an actual configuration state of the computing device that results from use of the dependency graph to coordinate configuring the set of features. Feedback concerning success or failure of the dependency graph on the computing device can be sent from the computing device to a configuration source. The dependency graph can be modified (by the computing device and/or the configuration source) based on whether an error is detected in the dependency graph.

The present disclosure provides an electronic device. The electronic device includes: a USB interface, including a first power wire and a signal wire, in which the USB interface is configured to receive a power signal via the signal wire, when the USB interface is coupled to a second electronic device, the first power wire is configured to output the power signal received to the second electronic device, and the signal wire is configured to acquire a voltage of a power wire of the second electronic device; a controller, configured to acquire the voltage of the first power wire and a voltage of the signal wire in the USB interface through a coupling between the USB interface and the second electronic device, to determine whether the interface coupling is abnormal according to the voltage difference.

Systems and devices can include an error injection register comprising error injection parameter information. The systems and devices can also include error injection logic circuit to read error injection parameter information from the error injection register, and inject an error into a flow control unit (Flit); and protocol stack circuitry to transmit the Flit comprising the error on a multilane link. The injected error can be detected by a receiver and used to test and characterize various aspects of a link, such as bit error rate, error correcting code, cyclic redundancy check, replay capabilities, error logging, and other characteristics of the link.

In some embodiments, a processing system includes at least one hardware block configured to change operation as a function of configuration data, a non-volatile memory including the configuration data for the at least one hardware block, and a configuration module configured to read the configuration data from the non-volatile memory and provide the configuration data read from the non-volatile memory to the at least one hardware block. The configuration module is configured to: receive mode configuration data; read the configuration data from the non-volatile memory; test whether the configuration data contain errors by verifying whether the configuration data are corrupted and/or invalid; and activate a normal operation mode or an error operation mode based on whether the configuration data contain or do not contain errors.

A method for building a configuration signature for an input/output (I/O) device is described herein. The configuration signature is built based on descriptors of an I/O device and save to a host after an initial connection. After the initial connection, the I/O device may be subjected to modifications. To determine if such modifications exist, the descriptors of the I/O device are compared to the configuration signature after the initial connection.

According to an embodiment, a system is provided that includes a debugging tool and an application board. The debugging tool includes a serial wire debug (SWD) host coupled to a single signal debug port (SSDP) host. The application board includes an SWD target coupled to an SSDP target. The SWD target is configured to communicate SWD signals with the SWD host. The SSDP target is configured to encode the SWD signals to SSDP signals for communication over a Controller Area Network (CAN) Bus between the application board and the debugging tool. The SSDP signals are pulse-width modulation (PWM) encoded signals of the SWD signals. An SWD clock signal generated by the SWD host is the carrier signal for the PWM encoded signals. The SSDP target is configured to decode the SSDP signals received from the SSDP host over the CAN Bus to the SWD signals.

Methods and systems are provided for validating and registering an IHS (Information Handling System) and components of the IHS for technical support. Upon delivery and initialization of an IHS, an inventory certificate that was uploaded to the IHS during factory provisioning of the IHS is retrieved. The inventory certificate includes an inventory that identifies factory-installed hardware components in the IHS. The inventory also specifies whether a registration requirement has been specified for the IHS, such as to initiate technical support. While still operating a pre-boot validation process, an inventory is collected of the detected hardware components of the IHS. Based on the inventory certificate, the validation process confirms whether a detected hardware component is a factory-installed hardware component and determines whether registration is required. If required, registration of the IHS is initiated by the validation process and initialization of the IHS continues.

The present invention relates generally to a system and method for measuring the structural characteristics of an object. The object is subjected to an energy application processes and provides an objective, quantitative measurement of structural characteristics of an object. The system may include a device, for example, a percussion instrument, capable of being reproducibly placed against the object undergoing such measurement for reproducible positioning. The invention provides for a system and methods for analyzing measured characteristics to identify issues and pathologies in the object, such as a tooth, and to recommend follow-up courses of action.