G06F11/2268

Method and system for dynamically unblocking customers in critical workflows by pushing community contributed solutions just-in-time when an error is encountered

Error occurrence/recurrence rates from multiple users of a software system are monitored. In one embodiment, log error data and context data associated with a critical issue is provided to a server side repository. When it is detected that a threshold number of users of a software application are facing the same critical issue a community portal is updated with a facility for users to post their solutions, i.e., workarounds, and/or observations, and/or comments, associated with the specific critical issue/error. In one embodiment, the posted solutions are rated and/or monitored, and if the rating for a given solution receives a rating above a threshold rating value, then data suggesting the solution, and/or implementing the solution, is pushed to users who continue to encounter the same critical issue, in one embodiment, using an action message framework, until a permanent fix is applied.

SYSTEMS AND METHODS FOR TESTING AN EMBEDDED CONTROLLER

Systems and methods described herein provide for testing and debugging different subsystems of an embedded controller using a testing architecture. The testing architecture can simulate messaging interfaces between internal subsystems of the embedded controller and external subsystems the controllers interacts with to integrate various types of software. A method includes generating test support models for one or more subsystems and establishing a communications network between the test support models and a control module of the embedded controller. A clock signal is generated to initiate processing within the testing architecture between the control module and the test support models. An event model is executed at the test support models using the clock signal and data is generated at one or more of the test support models responsive to the event model. The data can correspond to operational parameters of a respective system the embedded controller.

METHODS FOR GC (GARBAGE COLLECTION) POR (POWER OFF RECOVERY) AND APPARATUSES USING THE SAME
20180307496 · 2018-10-25 ·

The invention introduces a method for GC (garbage collection) POR (Power Off Recovery), performed by a processing unit, including at least the following steps: after a reboot subsequent to a power-off event, reading a GC recovery flag from a storage unit and determining whether the GC recovery flag indicates that a flash memory needs a POR; and, when the GC recovery flag indicates that the flash memory needs a POR, programming dummy data into a predefined number of empty pages next to the last programmed page of a destination block of the storage unit and performing an unfinished GC data-access operation.

METHODS AND APPARATUS FOR DATA ANALYSIS
20180293500 · 2018-10-11 ·

A method and apparatus for data analysis according to various aspects of the present invention is configured to test a set of components and generate test data for the components. A diagnostic system automatically analyzes the test data to identify a characteristic of a component fabrication process by recognizing a pattern in the test data and classifying the pattern using a neural network.

In system test of chips in functional systems

Manufacturers perform tests on chips before the chips are shipped to customers. However, defects can occur on a chip after the manufacturer testing and when the chips are used in a system or device. The defects can occur due to aging or the environment in which the chip is employed and can be critical; especially when the chips are used in systems such as autonomous vehicles. To verify the structural integrity of the IC during the lifetime of the product, an in-system test (IST) is disclosed. The IST enables self-testing mechanisms for an IC in working systems. The IST mechanisms provide structural testing of the ICs when in a functional system and at a manufacturer's level of testing. Unlike ATE tests that are running on a separate environment, the IST provides the ability to go from a functional world view to a test mode.

Techniques for testing semiconductor devices

Techniques for testing semiconductor devices include a semiconductor device having a plurality of components, a test bus, and a test data transfer unit. The test data transfer unit receives, from a host computer, configuration information for performing a test of the semiconductor device, reads, via a high-speed data transfer link, test data associated with the test from memory of the host computer using direct memory access, sends the test data to the plurality of components via the test bus, causes one or more operations to be performed on the semiconductor device to effect at least a portion of the test, and after the one or more operations have completed, retrieves test results of the at least a portion of the test from the test bus and stores, via the high-speed data transfer link, the test results in the memory of the host computer using direct memory access.

Method and system for automatic error diagnosis in a test environment

A method for automatic error diagnosis in a test environment is provided. The method comprises the step of providing a plurality of test logs associated with known types of failures, each comprising a set of files. The method further comprises the step of arranging the plurality of test logs in a defect database. Moreover, the method comprises the step of transforming the set of files of the plurality of test logs into vectors adapted to be fed into a machine learning model.

METHOD OF PERFORMANCE HARVESTING IN CORE MATRIX STRUCTURE AND DEVICE OF PERFORMING THE SAME
20240338289 · 2024-10-10 · ·

The present disclosure relates to a method and device for performing performance harvesting, where multiple cores are embedded in a matrix structure and configured to perform their operations independently, for allowing the remaining cores, which operate normally despite some cores not functioning, to independently produce results of operations by harvesting their respective performances, by being configured to test the operations of each of the multiple cores, bypass cores with defects (or faults, fails, etc.), and exclude the defected cores from the operations.

Determination of structural characteristics of an object

The present invention relates generally to a system and method for measuring the structural characteristics of an object. The object is subjected to an energy application processes and provides an objective, quantitative measurement of structural characteristics of an object. The system may include a device, for example, a percussion instrument, capable of being reproducibly placed against the object undergoing such measurement for reproducible positioning. The invention provides for a system and methods for analyzing measured characteristics to identify issues and pathologies in the object, such as a tooth, and to recommend follow-up courses of action.

LOG MESSAGE GROUPING APPARATUS, LOG MESSAGE GROUPING SYSTEM, AND LOG MESSAGE GROUPING METHOD
20180203757 · 2018-07-19 · ·

A log message grouping apparatus calculates a coincidence degree evaluation value E1 representing the degree of coincidence between minority words, which are relatively low occurrence frequency words, out of the words that form a log message and minority words in another log message. The log message grouping apparatus further calculates an occurrence degree evaluation value E2 representing the degree of occurrence of the combination of a classification value of a log message and the classification value of a past log message on the basis of the occurrence frequency of the combination of the classification values and calculates an association degree evaluation value E3 representing the degree of association between the log message and the past log message on the basis of the coincidence degree evaluation value E1 and the occurrence degree evaluation value E2.