A method for error management in bus communication is disclosed. A first bus subscriber generates a first bus message and writes a bus error code into a bus data area of a first bus message. The second bus subscriber identifies the error by evaluating the bus error code. The first bus subscriber stores an error identification of the error, generates a first bus message and writes the bus error code into the bus data area of the first bus message. A second bus message with a request for transmission of the error identification is generated by the second bus subscriber. A third bus message is generated by the first bus subscriber and the stored error identification is written into the bus data area of the third bus message. The second bus subscriber identifies the errors by evaluating the bus error code and the error identification.

A method and apparatus for testing an electronic device is provided. The method begins when at least one test setup vector for at least one test to be performed is generated. An actual test vector is then generated. The actual test vector may be generated using test results from testing at least one device of known good quality. A delay time parameter determined by waiting for the test controller to complete the test. After the delay time parameter has been determined, at least one test result is output as a test signature. The test signature and the delay time parameter may used to call the test and provide for counter-based delay independent memory testing. The apparatus includes a test controller and a vector memory in communication with the test controller and at least one clock in communication with the test controller and a power supply.

Systems, methods, and apparatus for testing devices adapted for connection to other devices using universal serial bus (USB) are disclosed. Devices to be tested are caused to enter a special mode of operation when a resistance measured across two terminals of a USB Type-C connector has a value associated with the special mode of operation. One or more operations of the device are automatically initiated when the resistance between the two terminals has a measured value that matches one of a set of resistance values maintained by the device. The one or more operations may include configuring a power management circuit based on the measured value, and entering a special or factory boot mode that controls startup of at least one processor on the device based on the measured value. Each of the set of resistance values exceeds a minimum open-circuit resistance value specified for the connector.

A memory system includes a memory device including plural non-volatile memory blocks and a controller configured to determine whether a first memory block among the plural non-volatile memory blocks is re-usable after the first memory block is determined to be a bad block and copy second block information associated with a second memory block including a second program sequence number within a set range of a first program sequence number in the first memory block to first block information of the first memory block.

A bus monitoring device and method, a non-transitory computer-readable storage medium, and an electronic device are disclosed. The bus monitoring method may include: arranging monitoring nodes in a bus, with each monitoring node arranged in one of subsystems to be tested of the bus, where the monitoring nodes are connected in series in a ring topology (202); acquiring a test vector and sending a test message according to the test vector to one of the monitoring nodes to transmit the test message across the monitoring nodes, the test vector being configured to instruct each monitoring node to execute the test message and acquire test information of the respective subsystem to be tested, where the test information is configured to indicate information of the bus of the respective subsystem to be tested when the monitoring node executes the test message (204).

A virtual device acquires a transaction history between a legacy computing device and a linked device; obtains a first request provided from the legacy computing device based on the transaction history and a first response received from the linked device in response to the first request; receives a second request corresponding to the first request from a new computing device and determines a second response to the second request; and provides test information for the new computing device based on a comparison of the first response and the second response.

Techniques for automatically selecting device tests for testing devices configured for operation in wireless communication networks, based upon maintenance releases (MRs) received from original equipment manufacturers. When an MR with changes for a device is received, the MR may be analyzed in order to determine what the changes pertain to with respect to the device. The changes may be clustered with respect to requirements for the changes and a knowledge base may be consulted by a recommendation engine in order to determine candidate tests for testing the MR. The candidate tests may be based upon previous tests, failed tests and, relevant tests. Based at least in part on the identified previous tests, failed tests and relevant tests, one or more tests may be selected for testing devices with respect to the newly received MR.

An exemplary testing environment can operate in a testing mode of operation to test whether a memory device or other electronic devices communicatively coupled to the memory device operate as expected or unexpectedly as a result of one or more manufacturing faults. The testing mode of operation includes a shift mode of operation, a capture mode of operation, and/or a scan mode of operation. In the shift mode of operation and the scan mode of operation, the exemplary testing environment delivers a serial input sequence of data to the memory device. In the capture mode of operation, the exemplary testing environment delivers a parallel input sequence of data to the memory device. The memory device thereafter passes through the serial input sequence of data or the parallel input sequence of data to provide an output sequence of data in the shift mode of operation or the capture mode of operation or passes through the serial input sequence of data to provide a serial output sequence of scan data in the scan mode of operation.

A system includes one or more databases configured to store at least one configuration rule and one or more processors in communication with the databases. The processors may be configured to compare a product parameter to configuration rules to determine a drift item based on a current value of the product parameter being different than acceptable values defined by a test specified by the configuration rule, the test comprising one of a plurality of test types. The processors may be further configured to store, based on a determination that the drift item is not in a drift database of the databases, the drift item in a database, receive a record of one or more actions performed to resolve the drift item, and in response to receipt of the record, modify a status of the drift item from unresolved to resolved in the database.

A method of testing a data storage system includes maintaining libraries of test routines, a first library including a set of normal-functional tests each operable to test corresponding normal functionality of the data storage system, a second library including a set of fault inserters each being independently operable to induce a corresponding fault condition into the data storage system. Normal-functional tests are executed concurrently with one or more of the fault inserters to cause the normal-functional tests to encounter the corresponding fault conditions during execution and thereby test a response of the normal functionality of the data storage system to the occurrence of the fault conditions.