A checking device for a data preparation unit, including a preparation element for preparing sensor data for a data transmission; and a comparator for comparing the sensor data with the prepared sensor data; a fault of the data preparation unit being detected in the event that the prepared sensor data do not match the sensor data.

A method and system are provided for chip testing. The method includes ascertaining a baseline for a functioning chip with no stress history by performing a non-destructive test procedure on the functioning chip. The method further includes repeating the test procedure on a chip under test using a threshold derived from the baseline as a reference point to determine a stress history of the chip under test. The test procedure includes ordering each of a plurality of functional patterns by a respective minimum operating period corresponding thereto, ranking each pattern based on at least one preceding available pattern to provide a plurality of pattern ranks, and calculating a sum by summing the pattern ranks. The sum calculated by the ascertaining step is designated as the baseline, and the sum calculated by the repeating step is compared to the threshold to determine the stress history of the chip under test.

A semiconductor device, for example an integrated circuit such as a microcontroller (MCU) or a digital signal processor (DSP), includes a semiconductor die coupled with a power supply line, a debug module coupled with the semiconductor die to exchange semiconductor die debug command and data signals with the semiconductor die, and a modem coupled with the power supply line. The debug module is arranged to convey the semiconductor die debug command and data signals over the power supply line.

Apparatus and a method for processor core self-testing are disclosed. The apparatus comprises processor core circuitry to perform data processing operations by executing data processing instructions. Separate self-test control circuitry causes the processor core circuitry to temporarily switch from a first state of executing the data processing instructions to a second state of executing a self-test sequence of instructions, before returning to the first state of executing the data processing instructions without a reboot of the processor core circuitry being required. There is also self-test support circuitry, wherein the processor core circuitry is responsive to the self-test sequence of instructions to cause an export of at least one self-test data item via the self-test support circuitry to the self-test control circuitry.

A test and measurement system for analyzing a device under test, including a database configured to store test results related to tests performed with one or more prior devices under test, a receiver to receive new test results about a new device under test, a data analyzer configured to analyze the new test results based on the stored test results, and a health score generator configured to generate a health score for the new device under test based on the analysis from the data analyzer.

A test and measurement system for analyzing a device under test, including a database configured to store test results related to tests performed with one or more prior devices under test, a receiver to receive new test results about a new device under test, a data analyzer configured to analyze the new test results based on the stored test results, and a health score generator configured to generate a health score for the new device under test based on the analysis from the data analyzer.

Computing systems, database systems, and related methods are provided for tracking performance associated with loading or updating a web page in a distributed manner. An exemplary method involves a server providing the web page to a client over a network. The web page includes code executable by the client to provide requests to the server over the network, assign identifiers to the requests, and determine client-side performance metrics associated with the requests. The server provides one or more responses corresponding to the requests to the client over the network, determines server-side performance metrics associated with providing the responses, receives the client-side performance metrics from the client after providing the responses, and maintains the associations between the client-side performance metrics, the server-side performance metrics, and the respective server requests using the identifiers assigned by the client.

A method of providing an abstraction layer between an application layer and one or more existing hardware components of a computing device includes receiving a request for a resource from the application layer, determining a component type for performing a task according to the request for the resource, determining whether the one or more existing hardware components of the computing device correspond to the component type for performing the task based on a predetermined function of the one or more existing hardware components, converting the task into a translated task readable by the one or more existing hardware components, providing the translated task to the one or more existing hardware components, receiving an output from the one or more existing hardware components as a result of providing the translated task, and providing the output to the application layer as an emulated output that mimics an expected output of the component type.

A method of providing an abstraction layer between an application layer and one or more existing hardware components of a computing device includes receiving a request for a resource from the application layer, determining a component type for performing a task according to the request for the resource, determining whether the one or more existing hardware components of the computing device correspond to the component type for performing the task based on a predetermined function of the one or more existing hardware components, converting the task into a translated task readable by the one or more existing hardware components, providing the translated task to the one or more existing hardware components, receiving an output from the one or more existing hardware components as a result of providing the translated task, and providing the output to the application layer as an emulated output that mimics an expected output of the component type.

In various examples, one or more components or regions of a processing unit—such as a processing core, and/or component thereof—may be tested for faults during deployment in the field. To perform testing while in deployment, the state of a component subject to test may be retrieved and/or stored during the test to maintain state integrity, the component may be clamped to communicatively isolate the component from other components of the processing unit, a test vector may be applied to the component, and the output of the component may be compared against an expected output to determine if any faults are present. The state of the component may be restored after testing, and the clamp removed, thereby returning the component to its operating state without a perceivable detriment to operation of the processing unit in deployment.