G06F11/26

RAPID SYSTEM DEBUGGING USING FINITE STATE MACHINES

Systems and methods for improving system debugging using finite state machines are described. In one embodiment, the systems and methods includes selecting, by a first multiplexor, a period of a timer tick for one or more blocks of a system on a chip (SoC), comparing, by a first comparator, a current state of the one or more blocks to a previous state of the one or more blocks, and receiving, by a finite state machine (FSM), the result from the first comparator as a first input, receiving a pulse based on the selected period of the timer tick from the first multiplexor as a second input, and based on the first and second inputs generating an output indicating whether the current and previous states remain unchanged after a time of at least two timer ticks. In one embodiment, a result from the first comparator indicates whether the current state equals the previous state of the one or more blocks.

Testing method and device to determine problem source of server failure

This application provides a testing method and a testing device to determine a problem source of a server failure. When a server experiences a failure, one or more than one Electro Magnetic Susceptibility (EMS) tests are performed and the time domain waveforms during an EMS test are compared to determine whether the server failure is related to EMS interference.

Testing method and device to determine problem source of server failure

This application provides a testing method and a testing device to determine a problem source of a server failure. When a server experiences a failure, one or more than one Electro Magnetic Susceptibility (EMS) tests are performed and the time domain waveforms during an EMS test are compared to determine whether the server failure is related to EMS interference.

Functional testing of code modifications for read processing systems
09811439 · 2017-11-07 · ·

Techniques for using functional testing to detect run-time impacts of code modifications. A method includes accessing a workflow including a plurality of stages for processing reads. The stages are defined based on modifiable code and include a first stage for aligning reads with a corresponding portion of a reference data set and a second stage for collectively analyzing data corresponding to the aligned reads. The method includes identifying functional testing specifications to correspond with the workflow, including a definition of which stages are to be performed during functional testing, a reduced reference data set, and a set of reads. The method includes performing the functional testing using the reduced reference data set and the set of reads, detecting a result generated via the performance, and outputting the result.

Functional testing of code modifications for read processing systems
09811439 · 2017-11-07 · ·

Techniques for using functional testing to detect run-time impacts of code modifications. A method includes accessing a workflow including a plurality of stages for processing reads. The stages are defined based on modifiable code and include a first stage for aligning reads with a corresponding portion of a reference data set and a second stage for collectively analyzing data corresponding to the aligned reads. The method includes identifying functional testing specifications to correspond with the workflow, including a definition of which stages are to be performed during functional testing, a reduced reference data set, and a set of reads. The method includes performing the functional testing using the reduced reference data set and the set of reads, detecting a result generated via the performance, and outputting the result.

Method and apparatus for correcting cache profiling information in multi-pass simulator

Provided method includes storing a first cache snap shot including cache profiling information regarding a cache when a first process being executed by a cycle accurate simulator is terminated; storing a second cache snap shot including the cache profiling information on the cache when a second process is executed in the cycle accurate simulator; comparing the second cache snap shot of the second process and the first cache snap shot of the first process to readjust any one value of a cache hit value and a cache miss value which are present in the second cache snap shot of the second process; and correcting the cache profiling information which is stored in the first cache snap shot of the first process by reflecting the readjusted any one value of the cache hit value and the cache miss value present in the second cache snap shot of the second process.

SEMICONDUCTOR DEVICE AND TEST METHOD THEREOF, AND NON-TRANSITORY COMPUTER READABLE MEDIUM
20230176871 · 2023-06-08 · ·

According to a certain embodiment, the semiconductor device includes: an integrated circuit unit; a command control unit configured to execute command control for the integrated circuit unit on the basis of a command, an address, and/or data, each supplied from an outside; an internal state control unit configured to detect an operating state inside the integrated circuit unit, and to provide an internal state signal indicating a first state or a second state in accordance with the detected operating state; and an instruction rejection control unit configured to instruct the internal state control unit to compulsorily turn the internal state signal to the first state if an operation of the integrated circuit unit has not been completed even after a predetermined maximum monitoring time has elapsed, and to instructs the command control unit to reject an input/output operation of the command, the address, and/or the data.

SEMICONDUCTOR DEVICE AND TEST METHOD THEREOF, AND NON-TRANSITORY COMPUTER READABLE MEDIUM
20230176871 · 2023-06-08 · ·

According to a certain embodiment, the semiconductor device includes: an integrated circuit unit; a command control unit configured to execute command control for the integrated circuit unit on the basis of a command, an address, and/or data, each supplied from an outside; an internal state control unit configured to detect an operating state inside the integrated circuit unit, and to provide an internal state signal indicating a first state or a second state in accordance with the detected operating state; and an instruction rejection control unit configured to instruct the internal state control unit to compulsorily turn the internal state signal to the first state if an operation of the integrated circuit unit has not been completed even after a predetermined maximum monitoring time has elapsed, and to instructs the command control unit to reject an input/output operation of the command, the address, and/or the data.

Monitoring performance of computing systems

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for monitoring performance of computing systems. In some implementations, a set of tasks for a server system to perform is identified. Multiple performance testing cycles are performed, in which each of the performance testing cycles includes: sending, for each task in the set of tasks, a request for the server system to perform the task; receiving a response from the server system for each of the requests, and storing a performance measure for each of the tasks based on the response received from the server system for the task. Based on the performance measures for the multiple performance testing cycles, an evaluation is performed whether conditions are satisfied for adjusting one or more operating parameters of the server system or for providing a notification regarding the operation of the server system.

Monitoring performance of computing systems

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for monitoring performance of computing systems. In some implementations, a set of tasks for a server system to perform is identified. Multiple performance testing cycles are performed, in which each of the performance testing cycles includes: sending, for each task in the set of tasks, a request for the server system to perform the task; receiving a response from the server system for each of the requests, and storing a performance measure for each of the tasks based on the response received from the server system for the task. Based on the performance measures for the multiple performance testing cycles, an evaluation is performed whether conditions are satisfied for adjusting one or more operating parameters of the server system or for providing a notification regarding the operation of the server system.