G06F11/26

MEMORY SYSTEM WITH ACCESSIBLE STORAGE REGION TO GATEWAY

A memory system comprising a first storage region which stores first firmware corresponding to an external first electronic control apparatus; a second storage region which stores second firmware corresponding to an external gateway and third firmware corresponding to the first electronic control apparatus; and a controller configured to transmit the second firmware and the third firmware to the gateway on the basis of a first command received from the gateway, and transmit the first firmware to the gateway on the basis of a second command received from the gateway.

ACCELERATOR SCHEDULING
20230034105 · 2023-02-02 · ·

An information handling system may include at least one central processing unit (CPU); and a plurality of special-purpose processing units. The information handling system may be configured to: receive information regarding cooling characteristics of the plurality of special-purpose processing units; and assign identification (ID) numbers to each of the plurality of special-purpose processing units in an order that is determined based at least in part on the cooling characteristics.

ACCELERATOR SCHEDULING
20230034105 · 2023-02-02 · ·

An information handling system may include at least one central processing unit (CPU); and a plurality of special-purpose processing units. The information handling system may be configured to: receive information regarding cooling characteristics of the plurality of special-purpose processing units; and assign identification (ID) numbers to each of the plurality of special-purpose processing units in an order that is determined based at least in part on the cooling characteristics.

EVALUATION OUTPUT OF A SYSTEM OR PORTIONS THEREOF

A method for execution by an analysis unit includes obtaining a collection of data for a particular evaluation of a system aspect. The method further includes acquiring data analysis parameters regarding the particular evaluation of the system aspect. The method further includes determining at least one of: one or more evaluation perspectives based on the data analysis parameters. The method further includes determining one or more evaluation modalities based on the data analysis parameters. The method further includes determining one or more evaluation metrics based on the data analysis parameters. The method further includes evaluating the collection of data in accordance with the at least one of the one or more evaluation metrics, the one or more evaluation perspectives, and the one or more evaluation modalities to produce one or more evaluation outputs.

EVALUATION OUTPUT OF A SYSTEM OR PORTIONS THEREOF

A method for execution by an analysis unit includes obtaining a collection of data for a particular evaluation of a system aspect. The method further includes acquiring data analysis parameters regarding the particular evaluation of the system aspect. The method further includes determining at least one of: one or more evaluation perspectives based on the data analysis parameters. The method further includes determining one or more evaluation modalities based on the data analysis parameters. The method further includes determining one or more evaluation metrics based on the data analysis parameters. The method further includes evaluating the collection of data in accordance with the at least one of the one or more evaluation metrics, the one or more evaluation perspectives, and the one or more evaluation modalities to produce one or more evaluation outputs.

DATA RECOVERY VALIDATION TEST

Techniques are described for a data recovery validation test. In examples, a processor receives a command to be included in the validation test that is configured to validate performance of an activity by a server prior to a failure to perform the activity by the server. The processor stores the validation test including the command on a memory device, and prior to the failure of the activity by the server, executes the validation test including the command responsive to an input. The processor receives results of the validation test corresponding to the command and indicating whether the server performed the activity in accordance with a standard for the activity during the validation test. The processor provides the results of the validation test in a user interface.

DATA RECOVERY VALIDATION TEST

Techniques are described for a data recovery validation test. In examples, a processor receives a command to be included in the validation test that is configured to validate performance of an activity by a server prior to a failure to perform the activity by the server. The processor stores the validation test including the command on a memory device, and prior to the failure of the activity by the server, executes the validation test including the command responsive to an input. The processor receives results of the validation test corresponding to the command and indicating whether the server performed the activity in accordance with a standard for the activity during the validation test. The processor provides the results of the validation test in a user interface.

CONFIGURATION OF WEIGHTED ADDRESS POOLS FOR COMPONENT DESIGN VERIFICATION
20230091566 · 2023-03-23 ·

A system for testing a design of a computing component includes an input device configured to receive a request to perform a test of a component, and a testing unit including a simulation of the component. The simulation is configured to output a result indicative of a response to a set of instruction addresses, the set of instruction addresses is acquired from a plurality of addresses, and the plurality of addresses including a plurality of address groups, where each address group is associated with a respective group identifier. The system also includes a plurality of requestors configured to apply the set of instruction addresses to the simulation, where a requestor of the plurality of requestors is configured to select an address for application to the simulation based on a received group identifier and a variably configurable weight value assigned to the received group identifier and the requestor.

CHAINED LOADING WITH STATIC AND DYNAMIC ROOT OF TRUST MEASUREMENTS

Establishing a diagnostic OS for an information handling system platform performing a UEFI BIOS boot to place the platform in a pre-OS state. Upon detecting a particular POST error and/or a platform configuration policy, an embedded OS kernel may be launched into a DRTM-authenticated measured launch environment (MLE). Additional objects for the diagnostic OS may be downloaded. The additional objects may include an initial ramdisk (initrd) module and one or more applications specific to the particular diagnostic OS. The diagnostic OS may be launched as follows: for each diagnostic OS application, launching the application and extending a measurement of the application into a DRTM PCR. Launching the diagnostic OS may include launching an initrd module and extending a measurement of the initrd module into the DRTM PCR. A measurement of embedded OS kernel may be extended into the TPM and the embedded OS kernel may validate the UEFI BIOS sequence.

CHAINED LOADING WITH STATIC AND DYNAMIC ROOT OF TRUST MEASUREMENTS

Establishing a diagnostic OS for an information handling system platform performing a UEFI BIOS boot to place the platform in a pre-OS state. Upon detecting a particular POST error and/or a platform configuration policy, an embedded OS kernel may be launched into a DRTM-authenticated measured launch environment (MLE). Additional objects for the diagnostic OS may be downloaded. The additional objects may include an initial ramdisk (initrd) module and one or more applications specific to the particular diagnostic OS. The diagnostic OS may be launched as follows: for each diagnostic OS application, launching the application and extending a measurement of the application into a DRTM PCR. Launching the diagnostic OS may include launching an initrd module and extending a measurement of the initrd module into the DRTM PCR. A measurement of embedded OS kernel may be extended into the TPM and the embedded OS kernel may validate the UEFI BIOS sequence.