Patent classifications
G06F12/08
Techniques to support a holistic view of cache class of service for a processor cache
A holistic view of cache class of service (CLOS) to include an allocation of processor cache resources to a plurality of CLOS. The allocation of processor cache resources to include allocation of cache ways for an n-way set of associative cache. Examples include monitoring usage of the plurality of CLOS to determine processor cache resource usage and to report the processor cache resource usage.
Adaptive look-ahead configuration for prefetching data in input/output operations
Techniques are provided for adaptive look-ahead configuration for data prefetching. One method comprises, in response to a request for a data item in a storage system: obtaining a size of a look-ahead window for the request based on one of multiple available caching policies; and moving the requested data item and additional data items within the look-ahead window to the cache memory when the requested data item and/or the additional data items within the look-ahead window are not in the cache memory. The multiple available caching policies comprise a caching policy based on characteristics of an input/output workload of the storage system, or a portion thereof; and/or a caching policy based on an input/output workload of at least a portion of the storage system within a prior predefined time window. The look-ahead window size may be varied over time.
SYSTEMS, METHODS, AND APPARATUS FOR PAGE MIGRATION IN MEMORY SYSTEMS
A method for managing a memory system may include monitoring a page of a first memory of a first type, determine a usage of the page based on the monitoring, and migrating the page to a second memory of a second type based on the usage of the page. Monitoring the page may include monitoring a mapping of the page. Monitoring the mapping of the page may include monitoring a mapping of the page from a logical address to a physical address. Determining the usage of the page may include determining an update frequency of the page. Determining the usage of the page may include comparing the update frequency of the page to a threshold. Migrating the page may include sending an interrupt to a device driver. Migrating the page may include setting a write protection status for the page.
PROCESSING DATA PAGES UNDER GROUP-LEVEL ENCRYPTION
Computer-readable media, methods, and systems are disclosed for encrypting and decrypting data pages in connection with a database employing group-level encryption. A request to load a group-level encrypted logical data page into main memory is received, the data page being identified by a logical page number. A block of group-level encrypted data is loaded into the main memory of the database system from an address corresponding to the physical block number. A block of group-level encrypted data is loaded into the main memory of the database system. A header associated with the block of group-level encrypted data is decrypted using a data-volume encryption key, and an encryption-group identifier is accessed from the decrypted header. A group-level encryption key is retrieved from a key manager, and the remainder of the block of group-level encrypted data is decrypted using the group-level encryption key.
Bandwidth boosted stacked memory
A high bandwidth memory system. In some embodiments, the system includes: a memory stack having a plurality of memory dies and eight 128-bit channels; and a logic die, the memory dies being stacked on, and connected to, the logic die; wherein the logic die may be configured to operate a first channel of the 128-bit channels in: a first mode, in which a first 64 bits operate in pseudo-channel mode, and a second 64 bits operate as two 32-bit fine-grain channels, or a second mode, in which the first 64 bits operate as two 32-bit fine-grain channels, and the second 64 bits operate as two 32-bit fine-grain channels.
Managing collisions in a non-volatile memory system with a coherency checker
A request to read data from a location associated with a memory component is received. The request is assigned a first tag, the first tag having a first identifier of a first buffer to store data read from the location. The request to read data is determined to collide with an earlier request to write data to the location. The earlier request is assigned a second tag, the second tag having a second identifier of a second buffer to store data to write to the location. An attempt to lock the second tag and the second buffer for the request to read data is made. The request to read data is fulfilled from the second buffer in response to a successful attempt to lock the second tag and the second buffer.
Systems and methods for prioritizing cache objects for deletion
Provided computer-implemented methods for prioritizing cache objects for deletion may include (1) tracking, at a computing device, a respective time an externally-accessed object spends in an external cache, (2) queuing, when the externally-accessed object is purged from the external cache, the externally-accessed object in a first queue, (3) queuing, when an internally-accessed object is released, the internally-accessed object in a second queue, (4) prioritizing objects within the first queue, based on a cache-defined internal age factor and on respective times the objects spend in the external cache and respective times the objects spend in an internal cache, (5) prioritizing objects within the second queue based on respective times the objects spend in the internal cache, (6) selecting an oldest object having a longest time in any of the first queue and the second queue, and (7) deleting the oldest object. Various other methods, systems, and computer-readable media are disclosed.
Notifying memory system of host events via modulated reset signals
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to receive a reset signal from a host computer system in communication with the memory system; identify, by decoding the reset signal, a host event specified by the reset signal; and process the identified host event.
Controller and memory system
A memory system includes a first memory device including a plurality of first physical blocks; a second memory device including a plurality of second physical blocks; a first core suitable for managing a plurality of first super blocks that store data associated with a first logical address, the plurality of first super blocks being mapped to the plurality of first physical blocks; a second core suitable for managing a plurality of second super blocks that store data associated with a second logical address, the plurality of second super blocks being mapped to the plurality of second physical blocks; a global wear-leveling manager suitable for changing mapping between the first physical blocks, which are mapped to one among the first super blocks, and the second physical blocks, which are mapped to one among the second super blocks based on degrees of wear of the first and second super blocks.
Method, device and computer program product for building and verifying index file
Embodiments of the present disclosure relate to establishing and verifying an index file. The method for establishing an index file includes: in response to receiving a data block to be stored, determining first verification information for verifying the data block and a first storage address for storing the data block. This method further includes: based on the first verification information, determining an index entry for the data block and a second storage address for storing the index entry, wherein the index entry includes the first verification information and the first storage address, and the index entry will be included in the index file. This method further includes: based on the index entry and the second storage address, determining second verification information. This method further includes: based on the second verification information and historical verification information for the index file, determining third verification information for verifying the index file.