G06F13/102

High-performance wireless side channel

Systems and methods of controlling a docking station comprise establishing, by the wireless access point, a USB connection tunnelled over a local area wireless network connection with the mobile device, receiving, by the wireless access point over the USB connection, a request for an Internet Protocol (IP) or a Media Access Control (MAC) network address of the display controller, transmitting, by the wireless access point in response to the request, the IP or the MAC network address of the display controller to the mobile device over the USB connection, and receiving, by the wireless access point, the at least video data addressed to the IP or the MAC network address of the display controller and switching the at least video data addressed to the IP or the MAC network address of the display controller directly to the display controller without passing via the USB controller.

Establishing a trusted connection with a peripheral device

The present disclosure relates to systems, methods, and computer-readable media for establishing and managing a trusted connection between a peripheral device and a client device. For example, systems discussed herein include determining whether a peripheral device poses a security risk based on a combination of peripheral device data and a client profile including environmental data and historical usage data for the client device. Systems described herein may further grant a level of trust based on the determine security risk. The systems disclosed herein facilitate implementation of intelligent policies that are user friendly without exposing the client device to a variety of security threats.

PERIPHERAL ACCESS CONTROL USING BITMASKS INDICATING ACCESS SETTINGS FOR PERIPHERALS

An electronic device includes a transaction host, first and second peripherals, memory, an access control register, and first and second access controllers. The memory stores access control identifier management instructions, a first task related to the first peripheral, and a first bitmask indicating respective access settings for the first and second peripherals for performing the first task. The access control register includes a first access control identifier for the first peripheral and a second access control identifier for the second peripheral. The transaction host executes the access control identifier management instructions to program the first and second access control identifiers based on the first bitmask, and subsequently executes the first task. The first and second access controllers control access to the first and second peripherals, respectively, based on the respective first and second access control identifiers programmed based on the first bitmask.

Event-based debug, trace, and profile in device with data processing engine array

A device may include an array of data processing engines (DPEs) on a die and an event broadcast network. Each of the DPEs includes a core, a memory module, event logic in at least one of the core or the memory module, and an event broadcast circuitry coupled to the event logic. The event logic is capable of detecting an occurrence of one or more events in the core or the memory module. The event broadcast circuitry is capable of receiving an indication of a detected event detected by the event logic. The event broadcast network includes interconnections between the event broadcast circuitry of the DPEs. Detected events can trigger or initiate various responses, such as debugging, tracing, and profiling.

SYSTEM AND METHOD FOR RESOURCE-DRIVEN DATAPOINT AGGREGATION OF LIDAR DATAPOINTS EXCHANGED BETWEEN LIDAR SENSOR AND HOST COMPUTING DEVICE AND APPLICATION OF SAME
20230023701 · 2023-01-26 ·

A system and a method for performing exchange of lidar datapoints between a lidar sensor and a host computing device are provided. The lidar sensor stores a sensor payload size range, and the host computing device stores a host payload size range. When the lidar connection is initiated, the host computing device and the lidar sensor perform handshaking to determine an overlapping range between the host sensor payload size range and the sensor payload size range, and to negotiate an acceptable datapoint payload size based on the overlapping range. Once the handshaking is complete, the lidar connection may be performed using the acceptable data point payload size as a payload size thereof. Thus, the payload size is independent of a maximum transmission unit (MTU) of an Ethernet.

SECURE VSAN CLUSTER USING DEVICE AUTHENTICATION AND INTEGRITY MEASURMENTS

A node for a VSAN includes a BMC, a processor, and a plurality of VSAN objects. The processor instantiates a Cluster Membership, Monitoring, and Directory Service (CMMDS) and a BMC Service Module (SM). The CMMDS implements a Security Policy and Data Model (SPDM) architecture. The CMMDS determines an inventory list of the VSAN objects and a SPDM authentication state for each of the objects, and provides the inventory list and the SPDM authentication states to the BMC SM. The BMC SM provides the inventory list and the SPDM authentication state to the BMC. The BMC determines that a first VSAN object is not authenticated based upon the SPDM authentication state of the first VSAN object, and directs the CMMDS to halt input/output (I/O) operations on the VSAN to the first VSAN object.

Method and Apparatus to Enable CPU Host-Unaware Dynamic FPGA Reconfiguration
20230027807 · 2023-01-26 ·

The present disclosure is directed to enabling operation of a field programmable gate array (FPGA) while preventing application quiescence during FPGA reconfiguration. In embodiments of the disclosure, proxy agent firmware may enable downstream transactions (e.g., PCIe transactions) to be serviced during reconfiguration of the FPGA. Programmable logic states (e.g., PCIe configuration states or memory-mapped input/output (MMIO) states) are saved in memory and maintained by the proxy agent (via a management controller running the proxy agent). Once the FPGA is reconfigured, the state may be restored to the FPGA's programmable logic, and the FPGA may operate on the current state of the transactions.

System and Method for Polling-based Storage Command Processing
20230025907 · 2023-01-26 ·

A method, computer program product, and computing system for assigning a first set of interrupts for exclusive processing by a first set of central processing units (CPU) cores. A second set of interrupts may be assigned for processing by a second set of CPU cores. The first set of interrupts may be processed using the first set of CPU cores. The second set of interrupts may be converted to a set of polling operations, thus defining a set of converted polling operations. The set of converted polling operations may be processed using the second set of CPU cores.

System and method for distributing user interface device configurations
11563841 · 2023-01-24 · ·

A system that incorporates teachings of the present disclosure may include, for example, a system having a controller to collect a plurality of User Interface (UI) device configurations, receive a request from a computing device to download one or more of the plurality of UI device configurations, and transmit to the computing device the one or more UI device configurations requested to configure one or more UI devices of the computing device. Other embodiments are disclosed.

PERIPHERAL DEVICE PROTOCOLS IN CONFIDENTIAL COMPUTE ARCHITECTURES

Restricting peripheral device protocols in confidential compute architectures, the method including: receiving a first address translation request from a peripheral device supporting a first protocol, wherein the first protocol supports cache coherency between the peripheral device and a processor cache; determining that a confidential compute architecture is enabled; and providing, in response to the first address translation request, a response including an indication to the peripheral device to not use the first protocol.