Patent classifications
G06F13/12
Storage system resource rebuild based on input-output operation indicator
An apparatus comprises a storage system comprising at least one processing device and a plurality of storage devices. The at least one processing device is configured to obtain a given input-output operation from a host device and to determine that the given input-output operation comprises an indicator having a particular value. The particular value indicates that the given input-output operation is a repeat of a prior input-output operation. The at least one processing device is further configured to rebuild at least one resource of the storage system that is designated for servicing the given input-output operation based at least in part on the determination that the given input-output operation comprises the indicator having the particular value.
Extended memory neuromorphic component
Systems, apparatuses, and methods related to an extended memory neuromorphic component for performing operations in memory are described. An example apparatus can include a plurality of computing devices. Each of the computing devices can include a processing unit and a memory array. The example apparatus can further include a communication subsystem coupled to the at least one of the plurality of computing devices and to a neuromorphic component. At least one of the plurality of computing devices can receive a request from a host to perform an operation, receive an indication of data to be access in a memory device to perform the operation, and send an indication to the neuromorphic component to monitor the data to be accessed. The neuromorphic component can intercept data and determine that a portion of the data should be flagged.
Programmatic control of device I/O; EMF quiet mode, zone, signaling, and protocol
Programmatic control of device I/O and EMF quiet mode, zone, signaling, and protocol are disclosed. Programmatic device I/O control reduces EMF radiation from a device with a device I/O controller application for programmatic control of the device's I/O channels. Responsive to firing of control rules, the device I/O application calls device APIs to control I/O channel settings. A quiet mode that reduces overall EMF radiation from a device is administered by an administrator and controls the device's wired or wireless I/O channels to create an EMF quiet zone in which some or all devices in a vicinity respond to a request to put themselves into an EMF quiet mode.
Apparatus and method for generating data quality information of electric power equipment
The present invention relates to an apparatus for generating data quality information of electric power equipment, the apparatus including a data collector configured to collect a piece of measured data of electric power equipment, a storage configured to store a previous value and a set value for the piece of measured data, and a quality value generator configured to generate a quality value for the piece of measured data by applying the piece of measured data, the previous value, and the set value to a predetermined logic circuit.
DATA TRANSMISSION METHOD, CHIP, AND DEVICE
A data transmission method is provided. The method includes: a network interface card of a source device obtains a first notification message and a second notification message, wherein the first notification message indicates that a first to-be-processed remote direct memory access (RDMA) request exists in a first queue of the source device, the first queue stores a request of a first service application in the source device, the second notification message indicates that a second to-be-processed RDMA request exists in a second queue of the source device, and the second queue stores a request of a second service application in the source device; and the network interface card determines a processing sequence of the first queue and the second queue based on service levels, and sends the first to-be-processed RDMA request and the second to-be-processed RDMA request to a destination device according to the processing sequence.
SEQUENCER CHAINING CIRCUITRY
A system can include a plurality of sequencers each configured to provide a number of sequenced output signals responsive to assertion of a respective sequencer enable signal provided thereto. The system can include chaining circuitry coupled to the plurality of sequencers. The chaining circuitry can comprise logic to: responsive to assertion of a primary enable signal received thereby, assert respective sequencer enable signals provided to the plurality of sequencers in accordance with a first sequence; and responsive to deassertion of the primary enable signal, assert the respective sequencer enable signals provided to the plurality of sequencers in accordance with a second sequence.
Managing access to peripherals in a containerized environment
Access to peripherals can be managed in a containerized environment. A management service can be employed on a computing device to detect when a container is created. When a container is created or a peripheral is connected, the management service can determine that an application running within the container should be allowed to access a peripheral. The management service can then interface with a peripheral mapper running within the container to enable the application to access the peripheral. A peripheral access manager can also be employed to isolate the peripheral to the container.
Software update device and software update system
A software update device includes a reception unit that receives update data from the server; an update unit that updates software using the update data; a communication interface that communicates with the other software update devices; an update timing reception unit that receives from the server an update timing in which conditions for updating the software including a reception of an update trigger are described; a notification information reception unit that receives notification information including conditions for transmitting the update trigger to another software update device; an update trigger notification unit that transmits the update trigger to the other software update devices; an update trigger reception unit that receives the update trigger from the other software update devices; and an update start determination unit that causes the update unit to update the software when it is determined that all the conditions described in the update timing are satisfied.
A DEVICE CAPABLE OF BEING OPERATED IN DIFFERENT MODES
A computing device may have a number of ports that can be connected to different peripheral devices and the availability, capability and/or functionality available through different ports may change depending on a mode of operation of the computing device. A user will not generally be aware of which ports can be used as they are all, in theory, available and the usability of an individual port is likely to change if a different host device is connected to the docking station or according to the mode the computing device is operating in. This is especially the case if the ports can all accept the same plug, for example, a USB Type-C plug. In order to allow a user to see easily which port is/are active to provide a particular capability, a controller determines a mode of operation of the device, the mode of operation being such that particular capabilities are made available at one or more of the plurality of peripheral ports, and controls an indicator associated with a particular peripheral port to provide an indication that the particular peripheral port is active to provide a capability if a peripheral device requiring that capability is connected to the particular peripheral port.
SYSTEMS AND DEVICES FOR ACCESSING A STATE MACHINE
A device, includes an instruction buffer. The instruction buffer is configured to store instructions related to at least a portion of a data stream to be analyzed by a state machine engine as the device. The state machine engine includes configurable elements configured to analyze the at least a portion of a data stream and to selectively output the result of the analysis. Additionally, the instruction buffer is configured to receive the indications as part of a direct memory access (DMA) transfer.