An integrated memory assembly comprises a memory die and a control die bonded to the memory die. The memory die includes a memory structure of non-volatile memory cells. The control die is configured to program user data to and read user data from the memory die in response to commands from a memory controller. To utilize space more efficiently on the memory die, the control die compacts fragmented data on the memory die.

A system and method for logging state data from a power system control device on a computer system is disclosed. The computer system includes a power system supplying power to the computer system. The power system has a power-up sequence having a plurality of stages. The power system control device is coupled to the power system. The power system control device includes a finite state machine circuit having states corresponding to the stages of the power-up sequence. The control device also has a write controller, a storage buffer, and a communication interface. The write controller writes the state of the finite state machine circuit in the storage buffer. An external controller is coupled to the communication interface and is operable to read the stored state data.

Technologies for providing shared memory for accelerator sleds includes an accelerator sled to receive, with a memory controller, a memory access request from an accelerator device to access a region of memory. The request is to identify the region of memory with a logical address. Additionally, the accelerator sled is to determine from a map of logical addresses and associated physical address, the physical address associated with the region of memory. In addition, the accelerator sled is to route the memory access request to a memory device associated with the determined physical address.

A method of transmitting data in a storage device includes encrypting original data based on a homomorphic encryption algorithm to generate encrypted data, generating a parameter for regeneration of a ciphertext higher than an operation level of the encrypted data by using the encrypted data and a key value, and transmitting the encrypted data and the parameter to an external host device.

PAM encoding techniques that leverage unused idle periods in channels between data transmissions to apply longer but more energy-efficient codes. To improve energy savings, multiple sparse encoding schemes may be utilized selectively to fit different sized gaps in the traffic. These approaches may provide energy reductions, for example with memory READ and WRITE traffic, when transferring 4-bit data using 3-symbol sequences.

Selectively committing or rolling-back in-flight units of recovery is provided. An indicator is read in a transaction identifier information record corresponding to a unit of recovery that is in-flight. It is determined whether the indicator indicates a commit for the unit of recovery that is in-flight. In response determining that the indicator does indicate the commit for the unit of recovery that is in-flight, the unit of recovery that is in-flight corresponding to the transaction identifier information record is committed to form a committed unit of recovery. The committed unit of recovery corresponding to the transaction identifier information record is sent to a target system for further processing.

A memory controller component of a memory system stores memory access requests within a transaction queue until serviced so that, over time, the transaction queue alternates between occupied and empty states. The memory controller transitions the memory system to a low power mode in response to detecting the transaction queue is has remained in the empty state for a predetermined time. In the transition to the low power mode, the memory controller disables oscillation of one or more timing signals required to time data signaling operations within synchronous communication circuits of one or more attached memory devices and also disables one or more power consuming circuits within the synchronous communication circuits of the one or more memory devices.

Disclosed herein is a data storage device comprising a data path and an access controller. The data path comprises a data port configured to transmit data between a host computer and the data storage device. The data storage device is configured to register with the host computer as a block data storage device. A non-volatile storage medium stores encrypted user content data and a cryptography engine is connected between the data port and the storage medium and uses a cryptographic key to decrypt the encrypted user content data. The access controller generates a challenge for an authorized device; sends the challenge to the authorized device; receives a response to the challenge from the authorized device over the communication channel; calculates the cryptographic key based on the response; and provides the cryptographic key to the cryptography engine to decrypt the encrypted user content data stored on the storage medium.

The present disclosure includes apparatuses and methods related to bank coordination in a memory device. A number of embodiments include a method comprising concurrently performing a memory operation by a threshold number of memory regions, and executing a command to cause a budget area to perform a power budget operation associated with the memory operation.

Examples include a method of live migrating a virtual device by creating a virtual device in a virtual machine, creating first and second interfaces for the virtual device, transferring data over the first interface, detecting a disconnection of the virtual device from the virtual machine, switching data transfers for the virtual device from the first interface to the second interface, detecting a reconnection of the virtual device to the virtual machine, and switching data transfers for the virtual device from the second interface to the first interface.