The invention relates to a system for establishing a data connection between a master unit (M) and at least one device unit (D), wherein the master unit (M) is coupled to a primary coupler unit (D.sub.prim) and the at least one device unit (D) is coupled to a secondary coupler unit (D.sub.sec), in each case for electrical power transmission and for data transmission. The primary coupler unit (D.sub.prim) and the secondary coupler unit (D.sub.sec) can be coupled for data transmission. A control signal can be received and the system has three operating states that can be activated in dependence on the received control signal. When the first operating state is activated, there is a data connection according to the IO-Link standard between the master unit (M) and the device unit (D). When the second operating state is activated, primary coupler identification data (D.sub.prim-ID) are allocated to the primary coupler unit (D.sub.prim), wherein there is a data connection according to the IO-Link standard between the master unit (M) and the primary coupler unit (D.sub.prim). When the third operating state is activated, secondary coupler Identification date (D.sub.secID) are allocated to the secondary coupler unit (D.sub.sec), wherein there is a data connection according to the IO-Link standard between the master unit (M) and the secondary coupler unit (D.sub.sec). The invention furthermore relates to a method for operating the system.

A configurable multi-function Peripheral Component Interchange Express (PCIe) endpoint controller, integrated in a system-on-chip (SoC), that exposes multiple functions of multiple processing subsystems (e.g., peripherals) to a host. The SoC may include a centralized transaction tunneling unit and a multi-function interrupt manager. The processing subsystems output data to the host via the centralized transaction tunneling unit, which translates addresses provided by the host to a local address of the SoC. Therefore, the centralized transaction tunneling unit enables those processing subsystems to consume addresses provided by the host without the need for software intervention and software-based translation. The SoC may also provide isolation between each function provided by the processing systems. The multi-function interrupt manager enables the endpoint controller to propagate interrupt messages received from the processing subsystems to the host.

A configurable multi-function Peripheral Component Interchange Express (PCIe) endpoint controller, integrated in a system-on-chip (SoC), that exposes multiple functions of multiple processing subsystems (e.g., peripherals) to a host. The SoC may include a centralized transaction tunneling unit and a multi-function interrupt manager. The processing subsystems output data to the host via the centralized transaction tunneling unit, which translates addresses provided by the host to a local address of the SoC. Therefore, the centralized transaction tunneling unit enables those processing subsystems to consume addresses provided by the host without the need for software intervention and software-based translation. The SoC may also provide isolation between each function provided by the processing systems. The multi-function interrupt manager enables the endpoint controller to propagate interrupt messages received from the processing subsystems to the host.

A central processing unit includes a core, a state memory, a plurality of bus contacts, a data generation unit, and a bus interface unit. The state memory stores a state, the bus interface unit is coupled to the core and the state memory, and the bus interface unit selectively couples the core to the plurality of bus contacts or the data generation unit according to the state.

A central processing unit includes a core, a state memory, a plurality of bus contacts, a data generation unit, and a bus interface unit. The state memory stores a state, the bus interface unit is coupled to the core and the state memory, and the bus interface unit selectively couples the core to the plurality of bus contacts or the data generation unit according to the state.

A method and apparatus provide recovery from a computing device boot up error by detecting a current boot up error in the computing device, loading a plurality of recovery pre-EFI initialization modules (PEIMs), of a recovery unified extensible firmware interface (UEFI) BIOS for execution, wherein the recovery PEIMS include executable code to pre-initialize at least a processing unit and memory of the computing device in a pre-EFI initialization (PEI) phase of a multi-phase platform initialization operation, and recovering from the boot up error by booting up the computing device using the loaded plurality of recovery pre-EFI initialization modules.

A method and apparatus provide recovery from a computing device boot up error by detecting a current boot up error in the computing device, loading a plurality of recovery pre-EFI initialization modules (PEIMs), of a recovery unified extensible firmware interface (UEFI) BIOS for execution, wherein the recovery PEIMS include executable code to pre-initialize at least a processing unit and memory of the computing device in a pre-EFI initialization (PEI) phase of a multi-phase platform initialization operation, and recovering from the boot up error by booting up the computing device using the loaded plurality of recovery pre-EFI initialization modules.

Systems and methods involving quantum machines, hybrid quantum machines, aspects of quantum information technology and/or other features are disclosed. In one exemplary implementation, a system is provided comprising a quantum register that stores quantum information using qubits, wherein the qubits are configured to store the quantum information using particles or objects arranged in a lattice of quantum gates, a clock that provides a clock cycle to the quantum register, and a qubit-tie computing component coupled to the quantum register, wherein the qubit-tie computing component is configured to shift the quantum information between the qubits, wherein the system stores the qubits in different states using physical qualities, which may define qubits that are configured to be entangled and superposed at a same time. Further, the quantum register may comprise an entanglement component, and/or the qubit-tie computing component may comprise a superposition component.

Systems and methods enable data collection and analytics consumption with a generalized assurance framework using a message bus that supports a publish-subscribe model. A producer network element subscribes to a request topic on the message bus and posts, to the message bus, an announcement indicating a data topic is available from the producer network element. The producer network element receives via the message bus, the request topic including a request for the data topic and posts, to the message bus, records for the data topic in response to the request.

Systems and methods enable data collection and analytics consumption with a generalized assurance framework using a message bus that supports a publish-subscribe model. A producer network element subscribes to a request topic on the message bus and posts, to the message bus, an announcement indicating a data topic is available from the producer network element. The producer network element receives via the message bus, the request topic including a request for the data topic and posts, to the message bus, records for the data topic in response to the request.