G06F17/16

Information processing apparatus, information processing method, and program
11580194 · 2023-02-14 · ·

An information processing apparatus includes a sparse element detection part, a sparse location weight addition part, a multiplication part, a non-sparse data operation part, and an addition part. The sparse element detection part detects a predetermined sparse element from input data and outputs information about the sparse element. The sparse location weight addition part adds a first weight elements corresponding to the sparse element. The multiplication part multiplies an output of the sparse location weight addition part by the sparse element. The non-sparse data operation part performs an operation on non-sparse elements, each other than the sparse element in the input data. The addition part adds an output of the multiplication part and an output of the non-sparse data operation part.

Information processing apparatus, information processing method, and program
11580194 · 2023-02-14 · ·

An information processing apparatus includes a sparse element detection part, a sparse location weight addition part, a multiplication part, a non-sparse data operation part, and an addition part. The sparse element detection part detects a predetermined sparse element from input data and outputs information about the sparse element. The sparse location weight addition part adds a first weight elements corresponding to the sparse element. The multiplication part multiplies an output of the sparse location weight addition part by the sparse element. The non-sparse data operation part performs an operation on non-sparse elements, each other than the sparse element in the input data. The addition part adds an output of the multiplication part and an output of the non-sparse data operation part.

Systems and methods for encrypting data and algorithms

Systems, methods, and computer-readable media for achieving privacy for both data and an algorithm that operates on the data. A system can involve receiving an algorithm from an algorithm provider and receiving data from a data provider, dividing the algorithm into a first algorithm subset and a second algorithm subset and dividing the data into a first data subset and a second data subset, sending the first algorithm subset and the first data subset to the algorithm provider and sending the second algorithm subset and the second data subset to the data provider, receiving a first partial result from the algorithm provider based on the first algorithm subset and first data subset and receiving a second partial result from the data provider based on the second algorithm subset and the second data subset, and determining a combined result based on the first partial result and the second partial result.

Systems and methods for encrypting data and algorithms

Systems, methods, and computer-readable media for achieving privacy for both data and an algorithm that operates on the data. A system can involve receiving an algorithm from an algorithm provider and receiving data from a data provider, dividing the algorithm into a first algorithm subset and a second algorithm subset and dividing the data into a first data subset and a second data subset, sending the first algorithm subset and the first data subset to the algorithm provider and sending the second algorithm subset and the second data subset to the data provider, receiving a first partial result from the algorithm provider based on the first algorithm subset and first data subset and receiving a second partial result from the data provider based on the second algorithm subset and the second data subset, and determining a combined result based on the first partial result and the second partial result.

Method and apparatus to efficiently process and execute Artificial Intelligence operations
11580371 · 2023-02-14 · ·

A method, apparatus, and system are discussed to efficiently process and execute Artificial Intelligence operations. An integrated circuit has a tailored architecture to process and execute Artificial Intelligence operations, including computations for a neural network having weights with a sparse value. The integrated circuit contains at least a scheduler, one or more arithmetic logic units, and one or more random access memories configured to cooperate with each other to process and execute these computations for the neural network having weights with the sparse value.

METHOD AND APPARATUS FOR VECTOR SORTING USING VECTOR PERMUTATION LOGIC
20230037321 · 2023-02-09 ·

A method for sorting of a vector in a processor is provided that includes performing, by the processor in response to a vector sort instruction, generating a control input vector for vector permutation logic comprised in the processor based on values in lanes of the vector and a sort order for the vector indicated by the vector sort instruction and storing the control input vector in a storage location.

METHOD AND APPARATUS FOR VECTOR SORTING USING VECTOR PERMUTATION LOGIC
20230037321 · 2023-02-09 ·

A method for sorting of a vector in a processor is provided that includes performing, by the processor in response to a vector sort instruction, generating a control input vector for vector permutation logic comprised in the processor based on values in lanes of the vector and a sort order for the vector indicated by the vector sort instruction and storing the control input vector in a storage location.

SPARSE MATRIX OPERATIONS FOR DEEP LEARNING

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for parallelizing matrix operations. One of the methods includes implementing a neural network on a parallel processing device, the neural network comprising at least one sparse neural network layer, the sparse neural network layer being configured to receive an input matrix and perform matrix multiplication between the input matrix and a sparse weight matrix to generate an output matrix, the method comprising: for each row of the M rows of the output matrix, determining a plurality of tiles that each include one or more elements from the row; assigning, for each tile of each row, the tile to a respective one of a plurality of thread blocks of the parallel processing device; and computing, for each tile, respective values for each element in the tile using the respective thread block to which the tile was assigned.

OPERATION APPARATUS

An embodiment of the present disclosure provides an operation apparatus which includes a storage unit, a control unit and a compute unit. The technical solution provided in this disclosure can reduce resource consumption of convolution operation, improve the speed of convolution operation and reduce operation time.

COMPUTER-IMPLEMENTED METHOD OF SOLVING A HAMILTONIAN

The computer implemented method of solving a Hamiltonian can include performing, in a tensor network contracting a plurality of tensors in the network, a Lanczos method acting on the uncontracted tensors, the Lanczos method including evaluating a recursive relation of an equation including using the equation at least two times, forming a block tridiagonal matrix having a block size greater than one, based on the recursive relation, and diagonalizing the block tridiagonal matrix to obtain new tensors and energy levels of the tensor network, wherein at least one of the uncontracted tensors of the network has an index for the group of excitations; and solving for the rest of the tensor network, yielding an energy level solution of the Hamiltonian, outputting the energy level solution.