A data processing apparatus has floating-point add circuitry for performing a floating-point add operation for adding or subtracting two floating-point operands. The apparatus also has reciprocal estimation circuitry for performing a reciprocal estimation operation on a first operand to generate a reciprocal estimate value which represents an estimate of a reciprocal of a first operand or an estimate or a reciprocal of the square root of the first operand. The reciprocal estimation circuitry is physically distinct from the floating-point adder circuitry, which allows both the reciprocal estimate and the add operations to be faster.