According to one embodiment, an apparatus is capable of exchanging a frame with an external apparatus in a packet mode of a serial attached small computer system interface (SAS). The external apparatus includes a scrambler. The apparatus includes a descrambler and a controller. The descrambler is configured to descramble frame data scrambled by the scrambler. The controller is configured to, in a case where first frame data is received from the external apparatus, synchronize the descrambler with the scrambler using the first frame data and a first value that is to be scrambled by the scrambler to obtain the first frame data.

An apparatus for detecting integrity violation includes a feedback shift register including a plurality of registers connected in series, and a feedback function unit connected between an output of a number of the registers and an input of at least one of the registers. The apparatus further includes an integrity violation detector adapted to determine as to whether a sequence of values at an input or output of at least one of the registers, or a logic combination thereof, is a non-constant sequence or a constant sequence. The apparatus is further adapted to output an indication that the feedback shift register is in an integral state if the sequence of values is a non-constant sequence, or to output an indication that the feedback shift register is subjected to an integrity violation if the sequence of values is a constant sequence.

A true random metastable flip-flop (TRMFF) complier generates an electrical architecture for a TRMFF chain. The complier selects components for the TRMFF chain from a library of standard cells and logically connects these components in accordance with a primitive polynomial to generate the electrical architecture. The TRMFF chain provides a sequence of random numbers from one or more physical processes in accordance with the primitive polynomial. During operation, one or more microscopic phenomena inside and/or outside of the TRMFF chain can cause one or more low-level, statistically random entropy noise signals to be present within the TRMFF chain. The TRMFF chain advantageously utilizes the one or more low-level, statistically random entropy noise signals to provide the sequence of random numbers.

Disclosed embodiments include systems, methods, and computer-readable media for generating pseudo-random numbers. Disclosed embodiments may receive, by the at least one processor, range data indicating a range of numbers. Disclosed embodiments may generate, based on the range data and by the at least one processor, a digitized finite state machine configured to produce pseudo-random output within the range of numbers. Further, disclosed embodiments may provide, by the at least one processor to a specialized pattern-matching device, programmable instructions to implement the digitized finite state machine on the specialized pattern-matching device. Disclosed embodiments may transmit, by the at least one processor to the specialized pattern-matching device, a pseudo-random bit stream for processing by the digitized finite state machine. Disclosed embodiments may receive, by the at least one processor from the specialized pattern-matching device, pseudo-random output from the digitized finite state machine.

Disclosed embodiments include systems, methods, and computer-readable media for generating pseudo-random numbers. Disclosed embodiments may receive, by the at least one processor, range data indicating a range of numbers. Disclosed embodiments may generate, based on the range data and by the at least one processor, a digitized finite state machine configured to produce pseudo-random output within the range of numbers. Further, disclosed embodiments may provide, by the at least one processor to a specialized pattern-matching device, programmable instructions to implement the digitized finite state machine on the specialized pattern-matching device. Disclosed embodiments may transmit, by the at least one processor to the specialized pattern-matching device, a pseudo-random bit stream for processing by the digitized finite state machine. Disclosed embodiments may receive, by the at least one processor from the specialized pattern-matching device, pseudo-random output from the digitized finite state machine.