Systems, apparatuses and methods may provide for technology that identifies a NUMA node, defines a first virtual proximity domain within the NUMA node, and defines a second virtual proximity domain within the NUMA node, wherein the first virtual proximity domain and the second virtual proximity domain are defined via one or more OS interface tables.

A reconfigurable data processor comprises an array of configurable units configurable to allocate a plurality of sets of configurable units in the array to implement respective execution fragments of the data processing operation. Quiesce logic is coupled to configurable units in the array, configurable to respond to a quiesce control signal to quiesce the sets of configurable units in the array on quiesce boundaries of the respective execution fragments, and to forward quiesce ready signals for the respective execution fragments when the corresponding sets of processing units are ready. An array quiesce controller distributes the quiesce control signal to configurable units in the array, and receives quiesce ready signals for the respective execution fragments from the quiesce logic.

A hardware state machine connected to a processor, the hardware state machine configured to receive operational codes from the processor; a multiplexer connected to the processor, the hardware state machine and a checksum circuit, the multiplexer configured to receive data from the processor; and a transmit circuit connected to the multiplexer, the transmit circuit configured to receive data from the multiplexer for transmission to a far end device, wherein the hardware state machine is further configured to, responsive receiving one or more operational codes from the processor: cause the checksum circuit to alter a checksum value of a first data packet being transmitted by the transmit circuit; and cause the transmit circuit to preempt transmission of the first data packet and begin transmitting a second data packet once the checksum value so altered has been transmitted from the transmit circuit.

A mainframe computer is disclosed including a hardware platform (10) with hardware resources comprising processors and memory. The computer comprises a virtualization hypervisor software of the market (300). Thus, an instance (1) of a proprietary Mainframe software environment can run on the hardware architecture, in at least one first virtual machine that can run on the virtualization hypervisor. In order to guarantee the security/reliability and the performance of the mainframe computer, the virtualization hypervisor is configured so as to create a hardware resource pool (100) of the hardware platform that is dedicated to hosting, exclusively, the one (or more) virtual machine(s) in which an instance of the proprietary Mainframe software environment is running.

An information processing apparatus includes a receiving unit that receives a process request for processing data, and a controller that, in response to receipt of a process request by the receiving unit, assigns a process to one of a first processing group including a processing unit that processes data, and a second processing group in which one or more processing units can be placed, the processing unit included in the first processing group including a number of processing units less than a predetermined upper limit number. The controller preferentially activates and assigns a process to the processing units included in the first processing group, and if the controller receives a process request that the processing units included in the first processing group are unable to fully process, the controller places a processing unit in the second processing group and assigns a process to the processing unit.

A technique for job distribution within a grid environment includes receiving a job at a submission cluster for distribution of the job to at least one of a plurality of execution clusters where each execution cluster includes one or more execution hosts. Resource attributes are determined corresponding to each execution host of the execution clusters. For each execution cluster, execution hosts are grouped based on the resource attributes of the respective execution hosts. For each grouping of execution hosts, a mega-host is defined for the respective execution cluster where the mega-host for a respective execution cluster defines resource attributes based on the resource attributes of the respective grouped execution hosts. An optimum execution cluster is selected for receiving the job based on a weighting factor applied to select resources of the respective execution clusters.

A spinlock circuit connected to one or more first processors through one or more broadside interfaces. The spinlock circuit is configured to receive a plurality of requests for use of a computing resource from one or more first processors, and reply to each of the plurality of requests within a single clock cycle of the one or more first processors. The spinlock circuit can reply to each of the plurality of requests within a single clock cycle of the one or more first processors by alternately assigning the computing resource to a requesting processor from among the one or more first processors or indicating to the requesting processor from among the one or more first processors that the computing resource is not available.

A method, system, and computer program for processing records is disclosed. In some aspects, a method includes associating, on at least one of the plurality of processors, each record with a record set of a plurality of record sets. Each record set is assigned to a sub-database based on the record set. A cache is associated with each sub-database, and each sub-database and its associated cache is associated with a processor set. An affinity is created between each database cache and the associated processor set, and records are processed with the processor sets according to the associations.

A method for efficient use of a computing system of parallel processors to perform inversion of geophysical data, or joint inversion of two or more data types. The method includes assigning at least one control processor to control sequence of operations and reduce load imbalance, assigning a group of one or more processors dedicated to updating one or more model parameters, and assigning another group of one or more processors dedicated to forward modeling simulated data.

In some embodiments, the invention involves partitioning resources of a manycore platform for simultaneous use by multiple clients, or adding/reducing capacity to a single client. Cores and resources are activated and assigned to a client environment by reprogramming the cores' route tables and source address decoders. Memory and I/O devices are partitioned and securely assigned to a core and/or a client environment. Instructions regarding allocation or reallocation of resources is received by an out-of-band processor having privileges to reprogram the chipsets and cores. Other embodiments are described and claimed.