A memory module includes a plurality of main memory groups each suitable for storing user data and related ECC data; a cache memory group suitable for caching the user data of one among the main memory groups; an access controller suitable for accessing the main memory groups when user data to be accessed is not cached in the cache memory group; and an ECC unit suitable for performing an ECC operation for user data stored or to be stored in the main memory groups during an access operation for the user data stored or to be stored in the main memory groups.

A data access system including a processor and a storage system including a main memory and a cache module. The cache module includes a FLC controller and a cache. The cache is configured as a FLC to be accessed prior to accessing the main memory. The processor is coupled to levels of cache separate from the FLC. The processor generates, in response to data required by the processor not being in the levels of cache, a physical address corresponding to a physical location in the storage system. The FLC controller generates a virtual address based on the physical address. The virtual address corresponds to a physical location within the FLC or the main memory. The cache module causes, in response to the virtual address not corresponding to the physical location within the FLC, the data required by the processor to be retrieved from the main memory.

A data access system including a processor and a storage system including a main memory and a cache module. The cache module includes a FLC controller and a cache. The cache is configured as a FLC to be accessed prior to accessing the main memory. The processor is coupled to levels of cache separate from the FLC. The processor generates, in response to data required by the processor not being in the levels of cache, a physical address corresponding to a physical location in the storage system. The FLC controller generates a virtual address based on the physical address. The virtual address corresponds to a physical location within the FLC or the main memory. The cache module causes, in response to the virtual address not corresponding to the physical location within the FLC, the data required by the processor to be retrieved from the main memory.

A virtual installation module running on a user device determines that at least one application file chunk is to be stored in a memory of the user device prior to being executed, wherein the application file chunk includes a subset of the data of the application and is stored on a remote storage device that correspond to an application to be executed by the processing device. The virtual installation module determines when a request to execute the application on the user device will be received and stores the at least one application file chunk from the remote storage device in the memory of the user device based at least in part on when the at least one application file chunk will be utilized during execution of the application.

A data access system including a processor and a storage system including a main memory and a cache module. The cache module includes a FLC controller and a cache. The cache is configured as a FLC to be accessed prior to accessing the main memory. The processor is coupled to levels of cache separate from the FLC. The processor generates, in response to data required by the processor not being in the levels of cache, a physical address corresponding to a physical location in the storage system. The FLC controller generates a virtual address based on the physical address. The virtual address corresponds to a physical location within the FLC or the main memory. The cache module causes, in response to the virtual address not corresponding to the physical location within the FLC, the data required by the processor to be retrieved from the main memory.

A dual-mode, dual-display shared resource computing (SRC) device is usable to stream SRC content from a host SRC device while in an on-line mode and maintain functionality with the content during an off-line mode. Such remote SRC devices can be used to maintain multiple user-specific caches and to back-up cached content for multi-device systems.

A data access system including a storage drive, processor and cache module. The processor, in response to data required by the processor not being cached within one or more levels of cache of the processor, generates a first physical address (PA). The cache module includes a memory and first and second controllers. The memory is a final level of cache. The first controller converts the first PA into a virtual address. The second controller: converts the virtual address into a second PA; based on the second PA, determines whether the data is cached within the memory; and if the data is cached, accesses and forwards the data to the processor. The first or second controller determines whether a cache miss has occurred and, in response to a cache miss and based on the second PA or a third PA of the storage drive, retrieves the data from the storage drive.

Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings.

A dual-mode, dual-display shared resource computing (SRC) device is usable to stream SRC content from a host SRC device while in an on-line mode and maintain functionality with the content during an off-line mode. Such remote SRC devices can be used to maintain multiple user-specific caches and to back-up cached content for multi-device systems.

Shiftable memory that supports defragmentation includes a memory having built-in shifting capability, and a memory defragmenter to shift a page of data representing a contiguous subset of data stored in the memory from a first location to a second location within the memory to be adjacent to another page of stored data. A method of memory defragmentation includes defining an array in memory cells of the shiftable memory and performing a memory defragmentation using the built-in shifting capability of the shiftable memory to shift a data page stored in the array.