G06F2212/205

Enhanced operating system integrity using non-volatile system memory

Methods and apparatus for enhancing operating system integrity using non-volatile system memory are described. A computer system includes a system memory coupled to one or more processors. The system memory comprises at least a non-volatile portion. Memory is allocated from the non-volatile portion to store selected metadata associated with an operating system component that supports input-output (I/O) operations. In response to an operation that results in a metadata change at the component, a metadata entry is stored in the non-volatile portion. Subsequent to a failure event, contents of the metadata entry are read from the non-volatile portion to restore a state of the component.

MEMORY MANAGEMENT SYSTEM AND METHODS
20170262189 · 2017-09-14 ·

A memory management system and methods of using the same are disclosed herein. The memory management system can include storage devices including a tier 0 memory and a tier 1 memory. The storage devices can be connected to one or several user devices via one or several SANs and one or several virtualization devices. The one or several virtualization devices can control the storing of data in the storage devices such that a piece of data is stored in one of the tier 0 memory and the tier 1 memory based on a data attribute of the piece of data. Particularly, the piece of data can be stored in the tier 0 memory until a predetermined amount of time has passed, and the piece of data can then be moved to the tier 1 memory.

SYSTEM AND METHOD FOR RAM CAPACITY OPTIMIZATION USING ROM-BASED PAGING

Various embodiments of methods and systems for memory paging in a system on a chip (“SoC”) are disclosed. An exemplary method includes identifying a subset of a baseline data image stored in a secondary storage device and determining that a revision data image requires an update of the subset. In response to the update, generating a diff file that represents binary differences between the revision data image subset and the baseline data image subset. Next, storing the diff file in a primary storage device and, upon receiving a request for a data block associated with the revision data image that causes a page fault, generating the requested data block based on a combination of the baseline data image and the diff file.

SEMICONDUCTOR MEMORY DEVICE
20170262199 · 2017-09-14 ·

A semiconductor memory device includes a memory cell array including a block of memory cells, gates of which are connected to a plurality of word lines, and a control unit configured to perform a writing operation in response to a command received from the outside, the writing operation including applying a program level voltage to at least two word lines at the same time.

Enhanced logging using non-volatile system memory

Methods and apparatus for enhancing logging using non-volatile system memory are described. A computer system includes a system memory coupled to one or more processors. The system memory comprises at least a non-volatile portion. A range of memory locations within the non-volatile portion is selected as a low-latency high-durability log staging area. A plurality of log records representing respective events detected by one or more executable programs are generated, and at least a subset of the records is stored in the log persistence area. For analysis subsequent to a failure that results in a loss of data stored in a volatile portion of the system memory, log records written to the staging area within a time window immediately prior to the failure event are provided.

FeRAM-DRAM hybrid memory
09761312 · 2017-09-12 · ·

Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. One method includes determining whether to access a first memory cell of a first memory cell array or a second memory cell of a second memory cell array, where a first digit line coupled to the first memory cell is coupled to a paging buffer register including a sense amplifier. The method further includes operating a transfer gate based at least in part on determining to read the second memory cell of the second memory cell array, where the transfer gate is configured to selectively couple a second digit line coupled to the second memory cell to the paging buffer register through the first digit line.

COMPUTER SYSTEM INCLUDING MAIN MEMORY DEVICE HAVING HETEROGENEOUS MEMORIES, AND DATA MANAGEMENT METHOD THEREOF
20220229552 · 2022-07-21 ·

A computer system includes a first main memory, a second main memory having an access latency different from that of the first main memory and, a memory management system configured to manage the second main memory by dividing it into a plurality of pages, detect a hot page, among the plurality of pages, based on a write count of data stored in the second main memory, and move data of the hot page to a new page in the second main memory and to the first main memory.

Memory system including memory module, memory module, and operating method of memory module

A memory system includes a nonvolatile memory module and a first controller configured to control the nonvolatile memory module. The nonvolatile memory module includes a volatile memory device, a nonvolatile memory device, and a second controller configured to control the volatile memory device and the nonvolatile memory device. The first controller may be configured to transmit a read request to the second controller. When, during a read operation according to the read request, normal data is not received from the nonvolatile memory device, the first controller may perform one or more retransmits of the read request to the second controller without a limitation on a number of times that the first controller performs the one or more retransmits of the read request.

Data migration across tiers in a multi-tiered storage area network

A storage volume functioning at least in part as cache for a tiered storage system, the storage volume having an in-memory write extent consisting of write-accessed grains retrieved from a plurality of hot extents in a first tier of the tiered storage system, where the in-memory write extent is a same size as a block erase size of a solid-state drive tier of the tiered storage system. The storage volume further having an in-memory read extent consisting of read-accessed grains retrieved from the plurality of hot extents in the first tier of the tiered storage system.

SYSTEMS AND METHODS FOR COMPOSABLE COHERENT DEVICES

Provided are systems, methods, and apparatuses for resource allocation. The method can include: determining a first value of a parameter associated with at least one first device in a first cluster; determining a threshold based on the first value of the parameter; receiving a request for processing a workload at the first device; determining that a second value of the parameter associated with at least one second device in a second cluster meets the threshold; and responsive to meeting the threshold, routing at least a portion of the workload to the second device.