Patent classifications
G06F2212/222
Preserving data integrity during controller failures
Systems and processes are disclosed to preserve data integrity during a storage controller failure. In some examples, a storage controller of an active-active controller configuration can back-up data and corresponding cache elements to allow a surviving controller to construct a correct state of a failed controller's write cache. To accomplish this, the systems and processes can implement a relative time stamp for the cache elements that allow the backed-up data to be merged on a block-by-block basis.
System physical address size aware cache memory
In certain aspects, a tag memory comprises a plurality of non-configurable tag columns configured to be powered on during a normal operation; and a plurality of configurable tag columns, wherein a first portion of the plurality of configurable tag columns is configured to be powered off during the normal operation and a second portion of the plurality of configurable tag columns is configured to be powered on during the normal operation.
Apparatus, system, and method for managing commands of solid-state storage using bank interleave
An apparatus, system, and method are disclosed for efficiently managing commands in a solid-state storage device that includes a solid-state storage arranged in two or more banks. Each bank is separately accessible and includes two or more solid-state storage elements accessed in parallel by a storage input/output bus. The solid-state storage includes solid-state, non-volatile memory. The solid-state storage device includes a bank interleave that directs one or more commands to two or more queues, where the one or more commands are separated by command type into the queues. Each bank includes a set of queues in the bank interleave controller. Each set of queues includes a queue for each command type. The bank interleave controller coordinates among the banks execution of the commands stored in the queues, where a command of a first type executes on one bank while a command of a second type executes on a second bank.
Data storage system with adaptive, memory-efficient cache flushing structure
In a method of flushing cached data in a data storage system, instances of a working-set structure (WSS) are used over a succession of operating periods to organize cached data for storing to the persistent storage. In each operating period, leaf structures of the WSS are associated with respective address ranges of a specified size. Between operating periods, a structure-tuning operation is performed to adjust the specified size and thereby dynamically adjust a PD-to-leaf ratio of the WSS, including (1) comparing a last-period PD-to-leaf ratio to a predetermined ratio range, (2) when the ratio is below the predetermined ratio range, increasing the specified size for use in a next operating period, and (3) when ratio is above the predetermined ratio range, then decreasing the specified size for use in the next operating period.
Electronic device and method for utilizing memory space thereof
In various embodiments, an electronic device may include a display, a memory including a first space storing no data and a second space storing data, and a processor. The processor may be configured to control the electronic device to: receive an input for inputting a setting value for a fast data storage mode of the memory, to allocate a predetermined size of a free space of a file system of the electronic device as a temporary memory space for the fast data storage mode based on the setting value for the fast data storage mode, to control the memory to allocate a predetermined size of the first space as a borrowed space for the fast data storage mode corresponding to the size of the temporary memory space, to recognize occurrence of an event for starting data storage through the fast data storage mode, and to control the memory to perform the data storage using the borrowed space through the fast data storage mode in response to the occurrence of the event.
PROTOCOL BUFFER-BASED CACHE MIRRORING METHOD
Provided is a cache mirroring method applied to a master node. A batch of small Input/Output (IO) blocks in an all-flash product may be aggregated into a large IO block via a ProtoBuff, and a corresponding mirroring request is sent to a slave node, so as to achieve cache mirroring. In addition, the present application also provides a cache mirroring apparatus applied to a master node, a based cache mirroring method and apparatus applied to a slave node, an all-flash storage device, and an all-flash storage system, the technical effects of which correspond to the technical effects of the method.
System and method for non-volatile memory-based optimized, versioned, log-structured metadata storage with efficient data retrieval
A system and method for efficiently storing and accessing large volumes of metadata persistent on Non-Volatile Memory (NVM) storage systems is provided. The system applies log-structured, Copy-on-Write (CoW) B.sup.+ tree methods, and supports a core-affine data and resource partitioning approaches on the system's architecture and platform with a high-degree of parallelism within the CPU, NVMe storage, and networking devices. The subject system and method efficiently indexes both in-core (DRAM resident) and out-of-core (NVM resident) metadata, supports a variety of data access patterns, supports CoW features and provides verifiable data safety and integrity capabilities. The present system minimizes latencies over all aspects of the metadata management and access path by leveraging core-affine resource partitioning with runtime environment providing lightweight user-level threads with low-latency context switching that execute within the exclusive context of a dedicated CPU core, and partitioned resources.
PREFETCH OF RANDOM DATA USING APPLICATION TAGS
A processor may boot a system. The processor may determine a type of operation of data based on an application tag. The processor may analyze at least one specific table for the application tag. The processor may perform an operation associated with the application tag.
NON-VOLATILE MEMORY WITH OPTIMIZED READ
A non-volatile storage system that is implementing a storage region (e.g., a persistent memory region) which is accessible to a host (e.g., via a PCIe connection) and a cache for the storage region shares details of the structure of the storage region and/or the cache (e.g., cache segment size). With awareness of the shared details of the structure of the storage region and/or the cache, the host arranges and sends out requests to read data from the persistent memory region in a manner that takes advantage of parallelism within the non-volatile storage system. For example, the host may initially send out one read request per cache segment to cause the non-volatile storage system to load the cache. Subsequently, additional read requests are made to the non-volatile storage system, with the data already loaded (or starting to load) in the cache, thereby increasing performance.
CONFIGURABLE FLUSH OPERATION SPEED
Methods, systems, and devices for configurable flush operation speed are described. Before executing a flush operation at a first portion of a cache including single-level cells (SLCs), a memory system may communicate parameters associated with data stored in the first portion of the cache to a host system. The host system may then identify another portion of the cache (e.g., including either SLCs or multi-level cells (MLCs)) for the flush operation based on the parameters and a speed of a flush operation associated with the other portions of the cache. The host system may indicate the identified portion of the cache to the memory system and the memory system may execute a flush operation at the first portion of the cache. For example, the memory system may write a subset of the data stored at the first portion of the cache to a second portion of the cache.