In various embodiments, a parallel processor includes a parallel processor module implemented within a first die and a memory system module implemented within a second die. The memory system module is coupled to the parallel processor module via an on-package link. The parallel processor module includes multiple processor cores and multiple cache memories. The memory system module includes a memory controller for accessing a DRAM. Advantageously, the performance of the parallel processor module can be effectively tailored for memory bandwidth demands that typify one or more application domains via the memory system module.

A method is described. The method includes determining that a memory page is in one of an active state and an idle state from meta data that is maintained for the memory page. The method includes recording a past history of active/idle state determinations that were previously made for the memory page. The method includes training a neural network on the past history of the memory page. The method includes using the neural network to predict one of a future active state and future idle state for the memory page. The method includes determining a location for the memory page based on the past history of the memory page and the predicted future state of the memory page, the location being one of a faster memory and a slower memory. The method includes moving the memory page to the location from the other one of the faster memory and the slower memory.

A multi-platform data storage system that facilitates sharing of containers including one or more virtual storage resources. The multi-platform data storage system can, for example, include a storage interface configured to enable access to a plurality of storage platforms that use different storage access and/or management protocols, the plurality of storage platforms storing data objects in physical data storage; and a storage mobility and management layer providing virtual management of virtual storage resources corresponding to one or more data objects stored in the plurality of storage platforms, the storage mobility and management layer including at least a transfer module coupled to at least one network and configured to transfer at least one of the data objects. The transfer module can transfer the at least one of the data objects between the multi-platform data storage system and another data storage system.

Metadata computation apparatus includes a host interface, a storage interface and one or more processors. The host interface is configured to communicate over a computer network with one or more remote hosts. The storage interface is configured to communicate with one or more non-volatile memories of one or more storage devices. The processors are configured to manage local storage or retrieval of media objects in the non-volatile memories, to compute metadata for a plurality of media objects that are stored, or are en-route for storage, on the storage devices, wherein the media objects are of multiple media types, wherein the computed metadata tags a target feature in the media objects of at least two different media types among the multiple media types, and to store, in the non-volatile memories, the metadata tagging the target feature found in the at least two different media types, for use by the hosts.

A counter system includes a counter management subsystem, a storage subsystem having storage elements, and a non-volatile memory system storing a first counter including a first value field/first bitmap field combination for each storage element, and a second counter including a second value field/second bitmap field combination for each storage element. The counter management subsystem resets the first counter and, following each storage operation on a storage element, updates a bit in the first bitmap field for that storage element. When one of the first bitmap fields is filled, the counter management subsystem converts each first value field/first bitmap field combination to a respective first value, resets the second counter, updates the second value field for each storage element with the respective first value for each storage element and, following each storage operation on a storage element, updates a bit in the second bitmap field for that storage element.

A method for execution by a dispersed storage and task (DST) client module includes issuing a read threshold number of read slice requests are issued to storage units of the set of storage units. One or more encoded slices of a selected read threshold number of encoded slices are received. When a next encoded data slice of a decode threshold number of encoded data slices is received within a response timeframe, outputting of the next encoded data slice is initiated. When the next encoded data slice is not received within the response timeframe, receiving of another decode threshold number of encoded slices of the set of encoded slices is facilitated. The other decode threshold number of encoded slices are decoded to produce recovered encoded data slices, where the recovered encoded data slices includes at least a recovered next encoded data. Outputting of the recovered next encoded data slice is initiated.

A processing system includes a plurality of processor cores formed in a first layer of an integrated circuit device and a plurality of partitions of memory formed in one or more second layers of the integrated circuit device. The one or more second layers are deployed in a stacked configuration with the first layer. Each of the partitions is associated with a subset of the processor cores that have overlapping footprints with the partitions. The processing system also includes first memory paths between the processor cores and their corresponding subsets of partitions. The processing system further includes second memory paths between the processor cores and the partitions.

In one embodiment, an apparatus includes: a first memory controller to control access to a first memory, the first memory controller including a memory mirroring circuit, in response to a memory write request from a first processor socket for which the first memory comprises a primary memory region, to cause data associated with the memory write request to be written to the first memory and to send a shadow memory write request to a second memory to cause the second memory to write the data into a secondary memory region; and a shadow memory table including a plurality of entries each to store an association between a primary memory region and a secondary memory region. The memory mirroring circuit may access the shadow memory table to identify the secondary memory region. Other embodiments are described and claimed.

Some examples described herein provide for a partially coherent memory transfer. An example method includes moving data directly from a coherence domain of an originating symmetric multiprocessor (SMP) node across a memory fabric to a target location for the data within a coherence domain of a receiving SMP node.

A multi-platform data storage system configured to accessing a plurality of storage platforms that use different storage access and/or storage management protocols. The multi-platform data storage system can, for example, include a storage mobility and management layer providing virtual management of data stored in the plurality of storage platforms, and a storage protocol converter operatively coupled between the storage mobility and management layer and the plurality of storage platforms. During access and/or management communication from the storage mobility and management layer to a particular one of the storage platforms, the storage protocol converter can operate to convert the access and/or management communication from a layer protocol used by the storage mobility and management layer to the storage access protocol used by the particular one of the storage platforms.