A storage network operates by: issuing a read threshold number of read slice requests to storage units of a set of storage units, where the read threshold number of read slice requests identifies a read threshold number of encoded slices of a set of encoded slices corresponding to a data segment; when one or more other encoded data slices of the read threshold number of encoded slices is not received within a time threshold, facilitating receiving a decode threshold number of encoded slices of the set of encoded slices; decoding the decode threshold number of encoded slices to produce recovered encoded data slices, wherein a number of the recovered encoded data slices corresponds to the read threshold number minus a number of the encoded slices received within the time threshold; and outputting the recovered encoded data slices and the encoded slices of the read threshold number of encoded slices received within the time threshold.

Aspects of the invention include identifying a first subsystem and a second subsystem of a plurality of subsystems respectively storing a first compressed data and a second compressed data, wherein the first compressed data and the second compressed data are fragments of a requested data. A compression method used to compress the first compressed data and second compressed data is identified. A first accelerator of first subsystem and a second accelerator of the second subsystem is identified. The first compressed data from a first local memory of the first subsystem is offloaded to the first accelerator, and the second compressed data from a second local memory of the second subsystem is offloaded to the second accelerator, wherein offloading comprises provided a decompression method for the first compressed data and the second compressed data.

This disclosure provides methods, devices, and systems for memory management. The present implementations more specifically relate to techniques for providing shared memory services over a Compute Express Link (CXL) fabric. In some aspects, a memory management system may include a shared memory (SM) manager and multiple SM libraries each associated with a respective host device coupled to a shared memory via a CXL fabric. In some implementations, an SM library may negotiate read or write locks with the SM manager for an object in shared memory, where a read-lock grants the associated host device read access to the object and a write-lock grants the associated host device write access to the object. In some implementations, the SM manager may grant any number of read-locks, but only one write-lock, to any object in shared memory so that the object becomes immutable once the host device relinquishes its write-lock for the object.

A system and methods for migrating a virtual machine (VM). In one embodiment, a hypervisor receives a request to migrate the contents of a memory of a source VM in a first physical memory area to a destination VM in a second physical memory area, where the first and second physical memory areas are disjoint. The hypervisor executes the destination VM in response to the request, and detects an access of a page of memory of the destination VM. The hypervisor determines, in view of a data structure maintained by a guest operating system executing in the destination VM, that a first page of a memory of the source VM in the first physical memory area is currently in use by the destination VM. In response to the detecting, the hypervisor: copies, in view of the first page of VM memory being used by the destination VM, the contents of the first page to a corresponding page of the destination VM; and maps, in view of a second page of VM memory not being used by the destination VM, (i) a physical memory page that is external to the first physical memory area and to the second physical memory area to (ii) a page of the destination VM corresponding to the second page.

Disclosing a storage system, method of operating thereof and data structures usable for the operating. The method includes: accommodating a plurality of data structures informative of location of allocation chunks, each allocation chunk characterized by a predefined number K of available consecutive physical addresses; wherein the predefined number K is equal for all allocation chunks indicated by the same data structure and wherein there are at least two data structures informative of location of allocation chunks with a different predefined number K; identifying, prior to writing a data chunk, a data structure associated with respective logical group and informative of location of allocation chunks with the predefined number K equal to number M of consecutive physical addresses required for storing the data chunk; and allocating for the data chunk M consecutive physical addresses in accordance with the location of the allocation chunk, the location obtained from the identified data structure.

Systems and methods for routing requests to dynamically cached mappings are disclosed. A system may comprise a memory storing instructions and at least one processor configured to execute instructions to perform operations including: receiving an access request to access first item data from a user device, the access request having an access key; based on the access key, routing the request to a server having an in-memory cache with multiple partitions associated with different access key types and storing the first item data and second item data; receiving, from the server, the first item data; and transmitting the first item data to the user device.

A method for managing a memory associated with PCIe SSD including: generating memory pools of equal size from a predefined size of contiguous physical memory, each of the memory pools manages a memory request of different size and is associated with a respective predefined size of memory request; dividing each of the memory pools into first set of memory pages, each having a size equal to maximum size among the predefined size of the memory request associated with the respective memory pool; dividing each of the first set of memory pages into second set of memory pages, each having a size equal to the predefined size of the memory request associated with respective memory pool; and managing the contiguous physical memory by allocating a memory page from the second set of memory pages fora memory request corresponding to the size of the second set of memory pages.

A neural core, a neural processing device including same and a method for lauding data of a neural processing device are provided. The neural core comprises a processing unit configured to perform operations, an L0 memory configured to store input data and an LSU configured to perform a load task and a store task of data between the processing unit and the L0 memory, wherein the LSU comprises a local memory load unit configured to transmit the input data in the L0 memory to the processing unit, and the local memory load unit comprises a target decision module configured to identify and retrieve the input data in the L0 memory, a transformation logic configured to transform the input data and thereby generate transformed data and an output FIFO configured to receive the transformed data and transmit the transformed data to the processing unit in the received order.

A method includes obtaining, by a storage unit, memory mapping data and physical memory data from each of at least a memory mapping threshold number of storage units, where the at least the memory mapping threshold number of storage units does not include the storage unit. The method further includes obtaining first memory mapping data and first physical memory data of the storage unit, and determining an estimated memory remapping based on the first memory mapping data, the first physical memory data, the memory mapping data, and the physical memory data. The method further includes determining a memory remapping cost based on the estimated memory remapping and a memory remapping benefit based on the memory remapping cost. When the memory remapping benefit exceeds a threshold, the method further includes executing the estimated memory remapping of logical address space to physically addressable memory devices within the storage unit.

A system and method improve the performance of non-volatile memory storage by automatically, when one or more data storage devices are added to a first set of storage devices in a storage system, resulting in a second set of storage devices, remapping data stored in the first set of storage devices so as to redistribute data across the second set of storage devices while minimizing the amount of data moved to the newly added storage devices. In addition, the remapping and redistribution of data results in empty logical address regions in data storage devices from which data is copied, and a logical address compaction operation is used to remap one or more logical address ranges so as to eliminate the empty logical address regions, without moving data corresponding to the remapped logical address ranges.