An electronic device includes: a plurality of swap devices; a memory storing instructions and data to swap; and a processor configured to execute the instructions to: based on attributes of the data to swap stored in the memory and attributes of at least one swap device of the plurality of swap devices, identify a swap device for swapping the data among the plurality of swap devices, and swap the data using the identified swap device.

A method in one embodiment comprises separating logical block addresses of one or more storage devices of a storage system into a plurality of ranges of logical block addresses using a designated chunk size, the chunk size denoting a particular number of logical block addresses. The method further comprises assigning different ones of the ranges of logical block addresses to different ones of a plurality of cache entities of the storage system, to select paths for delivery of respective input-output operations from a host device to the storage system based at least in part on the assigning, detecting particular ones of the input-output operations that each overlap with two or more adjacent ranges of the plurality of ranges, and responsive to the detected input-output operations exceeding a threshold, modifying the chunk size and repeating at least portions of the separating, assigning, selecting and detecting utilizing the modified chunk size.

A system and method for reordering data blocks received from a zone of a memory device. An example method includes sending, by a host system to a memory sub-system comprising a memory device, a plurality of write commands; receiving, by the host system from the memory sub-system, block allocation metadata, wherein the block allocation metadata references one or more locations in the memory device corresponding to a zone; generating, by the host system, a reorder map based on the block allocation metadata; reading a plurality of data blocks associated with the zone; and reordering, by the host system, the plurality of data blocks based on the reorder map.

A system and method comprising: receiving a request to write data stored at a first range of a first volume to a second range of a second volume, where first metadata for the first range of the first volume is associated with a range of physical addresses where the data is stored in the storage system; and responsive to receiving the request: creating second metadata for the second range of the second volume, wherein the second metadata is associated with the range of physical addresses where the data is stored in the storage system; and associating the second volume with the second metadata.

A processing device in a host system monitors a data temperature of a plurality of memory pages stored in a host-addressable region of a cache memory component operatively coupled with the host system. The processing device determines that a first memory page of the plurality of memory pages satisfies a first threshold criterion pertaining to the data temperature of the first memory page and sends a first migration command indicating the first memory page to a direct memory access (DMA) engine executing on a memory-mapped storage component operatively coupled with the cache memory component and with the memory-mapped storage component via a peripheral component interconnect express (PCIe) bus. The first migration command causes the DMA engine to initiate a first DMA transfer of the first memory page from the cache memory component to a host-addressable region of the memory-mapped storage component.

A storage server and a method of driving the storage server are provided. The storage server includes a processor configured to: generate a plurality of flush write commands based on a write command of first data provided from a host, provide a replication command corresponding to the write command to an external storage server, and receive an operation completion signal of the replication command from the external storage server; a memory storing a program of a log file to which the plurality of flush write commands are logged; and a storage device configured to receive a multi-offset write command including one or more flush write commands logged to the log file, and perform a flush operation on the multi-offset write command. The processor is further configured to provide the multi-offset write command to the storage device based on the log file after receiving the operation completion signal.

Unified hardware and software two-level memory mechanisms and associated methods, systems, and software. Data is stored on near and far memory devices, wherein an access latency for a near memory device is less than an access latency for a far memory device. The near memory devices store data in data units having addresses in a near memory virtual address space, while the far memory devices store data in data units having addresses in a far memory address space, with a portion of the data being stored on both near and far memory devices. In response to memory read access requests, a determination is made to where data corresponding to the request is located on a near memory device, and if so the data is read from the near memory device; otherwise, the data is read from a far memory device. Memory access patterns are observed, and portions of far memory that are frequently accessed are copied to near memory to reduce access latency for subsequent accesses.

Apparatuses, systems, and methods for hierarchical memory systems are described. A hierarchical memory system can leverage persistent memory to store data that is generally stored in a non-persistent memory, thereby increasing an amount of storage space allocated to a computing system at a lower cost than approaches that rely solely on non-persistent memory. An example method includes receiving an interrupt message by a hypervisor, the interrupt message generated by a hierarchical memory component responsive to receiving a read request initiated by an input/output (I/O) device, gathering, by the hypervisor, address register access information from the hierarchical memory component, and determining, by the hypervisor, a physical location of data associated with the read request.

An apparatus comprises a processing device configured to monitor a storage cache storing a plurality of cache pages to determine whether the storage cache reaches one or more designated conditions and to determine cache replacement scores for at least a subset of the cache pages, the cache replacement scores being determined based at least in part on input-output access types for data stored in the cache pages. The processing device is also configured to select, responsive to determining that the storage cache has reached at least one of the one or more designated conditions, at least one of the cache pages to move from the storage cache to a storage device based at least in part on the determined cache replacement scores. The processing device is further configured to move the selected at least one of the plurality of cache pages from the storage cache to the storage device.

Aspects of the present disclosure relate to reducing the latency of data deduplication. In embodiments, an input/output (IO) workload received by a storage array is monitored. Further, at least one IO write operation in the IO workload is identified. A space-efficient probabilistic data structure is used to determine if a director board is associated with the IO write. Additionally, the IO write operation is processed based on the determination.