The disclosed technology provides for off-loading dirty data from a volatile cache memory to multiple non-volatile memory devices responsive to detection of a power failure. The arrangement of the dirty data is describable by a cache image, which is reconstructed within the volatile memory from the non-volatile memory devices responsive to detection of power restoration following the power failure.

A cache storage method includes providing a storage cache cluster, comprising a plurality of cache storage elements, for caching I/O operations from a plurality of virtual machines associated with a corresponding plurality of virtual hard disks mapped to a logical storage area network volume or LUN. Responsive to a cache flush signal, flush write back operations are performed to flush modified cache blocks to achieve or preserve coherency. The flush write back operations may include accessing current time data indicative of a current time, determining a current time window in accordance with the current time, determining a duration of the current time window, and identifying a current cache storage element corresponding to the current time window. For a duration of the current time window, only those write back blocks stored in the current cache storage element are flushed. In addition, the applicable write back blocks are flushed in accordance with logical block address information associated with each write back block.

A command to write data to a virtual location is received at a disk storage system. The virtual location is mapped to a tape storage system. A record is generated including the data, the virtual location, and a sequence value. The sequence value indicates relative sequence when compared to other sequence values. The record is written to a record location on a tape cartridge loaded in a tape drive. Record metadata on the disk storage system is modified to indicate that the first record location contains the first record. The data on the record can be read from the tape cartridge.

Systems, apparatuses, and methods related to a write-back cache policy to limit data transfer time to a memory device are described. A controller can orchestrate performance of operations to write data to a cache according to a write-back policy and write addresses associated with the data to a buffer. The controller can further orchestrate performance of operations to limit an amount of data stored by the buffer and/or a quantity of addresses stored in the buffer. In response to a power failure, the controller can cause the data stored in the cache to be flushed to a persistent memory device in communication with the cache.

A storage device includes a nonvolatile semiconductor memory device, and a controller configured to access the nonvolatile semiconductor memory device. When the controller receives a write command including a logical address, the controller determines a physical location of the memory device in which data are written and stores a mapping from the logical address to the physical location. When the controller receives a write command without a logical address, the controller determines a physical location of the memory device in which data are written and returns the physical location.

A storage system includes a storage device including a controller and a nonvolatile memory unit, and a host including a processor configured to determine whether or not the host is going to access the storage device within a predetermined range of time, and cause the storage device to be powered off when it is determined that the host is not going to access the storage device within the predetermined range of time.

A method for demoting data from a cache comprising heterogeneous memory types is disclosed. The method maintains, for a data element in the cache, a write access count that is incremented each time the data element is updated in the cache. The cache includes a higher performance portion and a lower performance portion. The method removes the data element from the higher performance portion in accordance with a cache demotion algorithm. If the data element also resides in the lower performance portion and the write access count is below a first threshold, the method leaves the data element in the lower performance portion. If the data element also resides in the lower performance portion and the write access count is at or above the first threshold, the method removes the data element from the lower performance portion. A corresponding system and computer program product are also disclosed.

A storage volume functioning at least in part as cache for a tiered storage system, the storage volume having an in-memory write extent consisting of write-accessed grains retrieved from a plurality of hot extents in a first tier of the tiered storage system, where the in-memory write extent is a same size as a block erase size of a solid-state drive tier of the tiered storage system. The storage volume further having an in-memory read extent consisting of read-accessed grains retrieved from the plurality of hot extents in the first tier of the tiered storage system.

A system and method comprising: receiving a request to write data stored at a first range of a first volume to a second range of a second volume, where first metadata for the first range of the first volume is associated with a range of physical addresses where the data is stored in the storage system; and responsive to receiving the request: creating second metadata for the second range of the second volume, wherein the second metadata is associated with the range of physical addresses where the data is stored in the storage system; and associating the second volume with the second metadata.

Systems, apparatuses, and methods related to a write-back cache policy to limit data transfer time to a memory device are described. A controller can orchestrate performance of operations to write data to a cache according to a write-back policy and write addresses associated with the data to a buffer. The controller can further orchestrate performance of operations to limit an amount of data stored by the buffer and/or a quantity of addresses stored in the buffer. In response to a power failure, the controller can cause the data stored in the cache to be flushed to a persistent memory device in communication with the cache.