G06F2212/311

Thread switch for accesses to slow memory
11294710 · 2022-04-05 · ·

A processing system suspends execution of a program thread based on an access latency required for a program thread to access memory. The processing system employs different memory modules having different memory technologies, located at different points in the processing system, and the like, or a combination thereof. The different memory modules therefore have different access latencies for memory transactions (e.g., memory reads and writes). When a program thread issues a memory transaction that results in an access to a memory module having a relatively long access latency (referred to as “slow” memory), the processor suspends execution of the program thread and releases processor resources used by the program thread. When the processor receives a response to the memory transaction from the memory module, the processor resumes execution of the suspended program thread.

Intelligent control of cache
11275691 · 2022-03-15 · ·

A method and system for intelligent control of read-ahead cache for a client application is provided. The method receives an application profile of the client application, the application profile indicating thresholds for determining a plurality of access patterns of the client application. The method also determines a current access pattern of the client application based on the thresholds and a historical access pattern of the client application. The current access pattern and the historical access pattern are one of the plurality of access patterns. The method further dynamically enables and disables read-ahead cache for the client application based on a transition between the historical access pattern and the current access pattern.

METHOD FOR ACCESSING DATA IN AN EXTERNAL MEMORY OF A MICROCONTROLLER
20220114114 · 2022-04-14 ·

A method for accessing data in an external memory of a microcontroller, the microcontroller having an internal memory. The method includes: providing a classification data record in the internal memory, the classification data record for data stored in segments in the external memory including a segment-data classification for each segment, the segment-data classification characterizing the data stored in the respective segment; and a read access in which data corresponding to a predetermined data classification are read from the external memory. The read access includes checking a segment, the segment-data classification of the segment being read from the internal memory during the checking and being compared to the predetermined data classification, and: if the segment-data classification read corresponds to the predetermined data classification, reading the data stored in the segment from the external memory, or, if the segment-data classification does not correspond, resuming with the checking step for a further segment.

Host side memory address management
11301372 · 2022-04-12 · ·

Methods, systems, and devices for host side memory address management are described. In some examples, a host system may identify a read request that includes a logical address of a block of a memory device. The read request may be associated with a descriptor indicating a page of a cache of the host system. The host system may determine to assign a descriptor to a page of the cache, and may recycle one or more pages of the cache. In some examples, the host system may determine whether the page indicated by the descriptor includes a mapping between the logical address and a physical address of the memory device, and may issue a read command to the memory device based on the page including the mapping.

COMPOUND STORAGE SYSTEM

A compound storage system including: a storage box having a plurality of storage devices; and a plurality of servers capable of executing one or more virtual machines. The storage box stores a logical volume. The virtual machines executable by the server include an application VM and a controller VM. When a predetermined situation occurs in which an application VM of a migration source server is migrated to a predetermined migration destination server, at least one processor of the one or more servers in the compound storage system migrates the application VM to the migration destination server, and migrates a control right of a logical volume used by the application VM to a controller VM of the migration destination server.

Memory system for utilizing a memory included in an external device

A memory system includes a memory device and a controller. The memory device stores a piece of data in a location which is distinguished by a physical address. The controller generates map data, each piece of map data associating a logical address, inputted along with a request from an external device, with the physical address, selects a piece of map data among the map data based on a status regarding the piece of map data, and transfers selected map data to the external device.

Caching assets in a multiple cache system

A computing device includes a volatile memory that includes a first cache, a non-volatile storage that includes a second cache, and a cache service. The cache service, responsive to a cache miss, retrieves that asset and writes that asset to the first cache and not the second cache. The cache service reads the asset from the first cache responsive to requests for the asset until the asset is evicted from the first cache or until the asset is promoted to the second cache. The cache service promotes the asset to the second cache upon determining that a set of one or more criteria are satisfied including a predefined number of cache hits for the asset when it is in the first cache. The cache service reads the asset from the second cache responsive to requests for the asset until the asset is evicted from the second cache.

Memory use in a distributed index and query system
11151155 · 2021-10-19 · ·

In a method of memory use in a distributed index and query system, a processing thread serializes a list of documents into a first memory object exclusively borrowed from a memory object pool of a memory to achieve a first segment comprising a serialized data array of the documents, an offset index, and a document count. The serialized data array is compressed by the processing thread into a second memory object exclusively borrowed from the memory object pool to achieve a second segment comprising a compressed serialized data array, the offset index, and the document count. Subsequent to the compression, the first memory object is release back to the memory object pool. The second segment is written to a data storage device, and subsequent to the writing, the second memory object is released back to the memory object pool.

LOCAL CACHED DATA COHERENCY IN HOST DEVICES USING REMOTE DIRECT MEMORY ACCESS

A first host device establishes connectivity to a logical storage device of a storage system. The first host device obtains from the storage system host connectivity information identifying at least a second host device that has also established connectivity to the logical storage device, caches one or more extents of the logical storage device in a memory of the first host device, and maintains local cache metadata in the first host device regarding the one or more extents of the logical storage device cached in the memory of the first host device. In conjunction with processing of a write operation of the first host device involving at least one of the one or more cached extents of the logical storage device, the first host device invalidates corresponding entries in the local cache metadata of the first host device and in local cache metadata maintained in the second host device.

In-memory distributed cache
11144463 · 2021-10-12 · ·

A method for an in-memory distributed cache includes receiving a write request from a client device to write a block of client data in random access memory (RAM) of a memory host and determining whether to allow the write request by determining whether the client device has permission to write the block of client data at the memory host, determining whether the block of client data is currently saved at the memory host, and determining whether a free block of RAM is available. When the client device has permission to write the block of client data at the memory host, the block of client data is not currently saved at the memory host, and a free block of RAM is available, the write request is allowed and the client is allowed to write the block of client data to the free block of RAM.