Various embodiments described herein provide for selectively sending a cache-based read command, such as a speculative read (SREAD) command in accordance with a Non-Volatile Dual In-Line Memory Module-P (NVDIMM-P) memory protocol, to a memory sub-system.

A varied least recently used (VLRU) caching technique is used to enable print data to be available at a cache of a client for printing, even after an agent performs a deletion of a hash value for the print data at a cache of the agent. The deletion of the print data (cached at the cache of the client) is postponed at the client device via the use of a waiting list, so that the cached print data can be printed at a physical printer of the client, in response to receiving a delayed print job from the agent that specifies the hash value as a result of a deduplication process performed by the agent.

A computer system, comprising first computers, an application operate on each of the first computers; the each of the first computers is coupled to a second computer for providing a storage area; the each of the first computers includes a processor, a memory, a cache device to which a cache area, and a interface; the memory includes a program for realizing an operating system; the operating system includes a cache driver; and a cooperation control module configured to issue a control I/O request for instructing arrangement control; and the cooperation control module generate the control I/O request from a detected I/O request based on a analysis result of the detected I/O request in a case where an issuance of the I/O request from the cache driver is detected; and transfer the control I/O request to an apparatus different from an apparatus of a transfer destination of the detected I/O request.

A processing device in a memory system receives, from a host system, a read command comprising an indication of a sub-region of a logical address space of a memory device. The processing device increments a counter associated with a region of the logical address space, the region comprising a plurality of sub-regions including the sub-region, the counter to track a number of read operations performed on the plurality of sub-regions of the region, wherein the counter is periodically decremented in response to an occurrence of a recency event on the memory device. The processing device further determines whether a value of the counter satisfies a cacheable threshold criterion and, responsive to the value of the counter satisfying the cacheable threshold criterion, sends, to the host system, a recommendation to activate the sub-region.

A memory system includes: a first memory subsystem suitable for storing a first segment of map data for first logical addresses in a logical address region; a second memory subsystem suitable for storing a second segment of map data for second logical addresses in the logical address region; and a host interface suitable for: providing any one of the first and second memory subsystems with a first read command of a host according to a logical address included in the read command, providing the host with an activation recommendation according to a read count of the logical address region including the provided logical address, providing map data for the first and second logical addresses obtained from the first and second memory subsystems, wherein the activation recommendation allows the host to further provide a physical address corresponding to a target logical address in the logical address region.

A computing system having memory components of different tiers. The computing system further includes a controller, operatively coupled between a processing device and the memory components, to: receive from the processing device first data access requests that cause first data movements across the tiers in the memory components; service the first data access requests after the first data movements; predict, by applying data usage information received from the processing device in a prediction model trained via machine learning, second data movements across the tiers in the memory components; and perform the second data movements before receiving second data access requests, where the second data movements reduce third data movements across the tiers caused by the second data access requests.

A system includes a host device, an external bus and a storage device. A driver is installed in the host device. The external bus is connected with the host device. The external bus supports a communication protocol. The storage device includes a controlling circuit and a non-volatile memory. After the storage device issues a request to the host device according to the communication protocol, a reserved space is created in a host memory of the host device in response to the request, and a device information from the storage device is stored into the reserved space. While the host device issues a first command to operate the storage device, the first command is converted into a second command by the driver according to the device information, and then the second command is transmitted to the storage device.

A method, computer program product, and computing system for processing one or more data chunks on a host server. The one or more data chunks are destined for storage within a portion of a data array coupled to the host server. The one or more data chunks are stored within a host cache system included within the host server. Storage criteria concerning the portion of a data array is reviewed. The storage criteria includes an array bandwidth allotment that defines a maximum bandwidth between the host server and the portion of the data array. The one or more data chunks are written to the portion of the data array based, at least in part, upon the storage criteria.

According to one embodiment, a memory system is connectable to a host including a first memory. The memory system includes a non-volatile second memory, a volatile third memory, and a controller. The controller uses the third memory as a work memory, and executes data transfer between the host and the second memory. The controller receives a first command to change a power mode from the host. The controller transfers first data to the first memory and transfers second data to the second memory in response to the receipt of the first command. The controller transmits a response of completion of data transfer. The first data and the second data are included in third data. The third data is data in the third memory.

Methods and apparatus for reliable distributed messaging are described. A computer system includes a system memory coupled to one or more processors. The system memory comprises at least a non-volatile portion. A particular location within the non-volatile portion is designated as a target location to which a sender module participating in a communication protocol is granted write permission. A receiver module participating in the communication protocol, subsequent to a failure event that results in a loss of data stored in a volatile portion of the system memory, reads a data item written by the sender program at the target location prior to the failure event. The receiver module performs an operation based on contents of the data item.