A host includes a cache including a plurality of cache lines, a command descriptor list configured to store a command transmitted from one of the plurality of cache lines, a host controller including a direct memory access (DMA) device that accesses the command descriptor list, and a processor configured to determine a size of the command descriptor list based on a size of the one of the plurality of cache lines.

A system and method for determining memory ownership on a cache line basis for detecting self-modifying code with instructions that overlap cache line boundaries. An ownership index and a cache line address are entered into the ownership queue for each cache line. The cache lines are translated into instructions, and a straddle bit is set for each instruction that was derived from cache line data that overlapped two cache lines. A stale bit is set for any entry of the ownership queue that collides with a store instruction. Each instruction issued for execution is marked with a first exception when the stale bit of the corresponding ownership queue entry is set, or when the straddle bit of the issued instruction and a stale bit of a next sequential entry are both set. A first exception is performed for each instruction ready to retire that is marked with the first exception.

Systems and methods are provided for expanding the available memory of a storage controller. The systems and methods utilize a PCIe memory controller connected to the backend interface of the storage controller. Memory of the PCIe memory controller is memory mapped to controller memory of the storage controller. The PCIe connection allows the storage controller to access the memory of the PCIe memory controller with latencies similar to that of the controller memory.

A disclosed system and method executable on a computer for managing a memory storage system includes prioritizing log data over cache data and over metadata in a configuration of multiple SSD (solid state drive) devices stitched in a virtual pool of data types including log write data, cache read data and metadata. The method also includes stitching the data types in the configuration across the multiple SSD devices in the virtual pool configured for a variable percentage cache data and a variable percentage metadata on top of a fixed percentage log data. The method further includes protecting the stitched data type configuration of multiple SSD devices in the virtual pool by creating multiple copies of the log data and multiple copies of the metadata and a single copy of the cache data. An intelligent and dynamic adjustment of metadata and cache data is based on a growth of the metadata.

A mixed cache is indexed to main memory and page coloring is applied to map main memory to virtual memory. A nursery array and a mature array are indexed to virtual memory. An access to a virtual page from the mixed cache is recorded by determining an index and a tag of an array address based on a virtual address, following the index to corresponding rows in the nursery and the mature arrays, and determining if the tag in the array address matches any tag in the rows. When there is a match to a tag in the rows, an access count in a virtual page entry corresponding to the matched tags is incremented. When there is no match, a virtual page entry in the row in the nursery array is written with the tag in the array address and an access count in the entry is incremented.

A read command is received from a host requesting data from a portion of a first memory of a data storage system and it is determined whether one or more sections of the first memory including the portion have previously been written to by the host. If it is determined that the one or more sections have not previously been written to by the host, predetermined data is sent to the host in response to the read command without reading the portion of the first memory. According to another aspect, the requested data from the read command is cached in a second memory of the data storage system based on whether the one or more sections of the first memory have previously been written to by the host.

Technologies for region-based cache management includes network computing device. The network computing device is configured to divide an allocated portion main memory of the network computing device into a plurality of memory regions, each memory region having a cache block that includes a plurality of cache lines of a cache memory of the processor. The network computing device is further configured to determine whether a cache line selected for eviction from the cache memory corresponds to one of the plurality of memory regions and, if so, retrieve a dynamically adjustable bias value (i.e., a fractional probability) associated with the corresponding memory region. Additionally, the network computing device is configured to generate a bias comparator value for the corresponding memory region, compare the bias value of the corresponding memory region and the bias comparator value generated for the corresponding memory region, and determine whether to evict the cache line based on the comparison. Other embodiments are described herein.

The present disclosure provides a data pre-processing method and device and related computer device and storage medium. By storing the target output data corresponding to the target operation into the first memory close to the processor and reducing the time of reading the target output data, the occupation time of I/O read operations during the operation process can be reduced, and the speed and efficiency of the processor can be improved.

In response to a cacheable write request from a host, physical cache locations are allocated from a free list, and the data blocks are written to those cache locations without regard to whether any read requests to the corresponding logical addresses are pending. After the data has been written, and again without regard to whether any read requests are pending against the corresponding logical addresses, metadata is updated to associate the cache locations with the logical addresses. A count of data access requests pending against each cache location having valid data is maintained, and a cache location is only returned to the free list when the count indicates no data access requests are pending against the cache location.

A storage controller failover system includes servers, storage controllers coupled to storage subsystems, and a switching system coupling the servers to the storage controllers. A storage controller configurations and storage controller caches for each of the storage controllers are stored in one or more database. A failure is detected of a first storage controller that has provided first storage communications along a first path between a first server and a first storage subsystem and, in response, a second storage controller that is configured to take over the first storage communications from the first storage controller is determined based on its second storage controller configuration. A first storage controller cache for the first storage controller is provided to the second storage controller, and the second storage controller is caused to provide the first storage communications along a second path between the first server and the first storage subsystem.