A request is received to program host data to a memory device of a memory sub-system. The host data is associated with a logical address. A redundancy factor that corresponds to the logical address associated with the host data is obtained. A first physical address associated with a first set of cells of the memory device and a second physical address associated with a second set of cells of the memory device are determined based on the redundancy factor. The first set of memory cells is to store the host data and the second set of memory cells is to store redundancy metadata associated with the host data. The host data is programmed to the first set of memory cells. The redundancy metadata associated with the host data is programmed to the second set of memory cells.

A method that includes writing a plurality of codewords to a plurality of memory blocks of a memory device, where each of the plurality of codewords has a physical codeword index corresponding to a respective memory block in which each codeword is written, and assigning a virtual codeword index to each of the plurality of codewords to provide a plurality of virtual codeword indices, where assigning the virtual codeword index to each of the plurality of codewords is based, at least in part, on a location in a virtual block among a plurality of virtual blocks of memory cells corresponding to the physical codeword index of each codeword among the plurality of codewords.

According to one general aspect, an apparatus may include a memory configured to store both data and metadata, such that for portions of data associated with the metadata, the data and metadata are interleaved such that a unit of metadata succeeds each power of two contiguous units of data. The apparatus may also include a memory manager circuit. The memory management circuit may be configured to receive a data access to the memory, wherein the data access includes a public memory address. The memory management circuit may be configured to determine if the public memory address is associated with metadata. The memory management circuit may be configured to, if so, convert the public memory address to a private memory address. The memory management circuit may be configured to complete the data access at the private memory address.

In some examples, performance counters for computer memory may include ascertaining a request associated with a memory address range of computer memory. The memory address range may be assigned to a specified performance tier of a plurality of specified performance tiers. A performance value associated with a performance attribute of the memory address range may be ascertained, and based on the ascertained performance value, a weight value may be determined. Based on the ascertained request and the determined weight value, a count value associated with a counter associated with the memory address range may be incremented. Based on an analysis of the count value associated with the counter, a determination may be made as to whether the memory address range is to be assigned to a different specified performance tier of the plurality of specified performance tiers. Based on a determination that the memory address range is to be assigned to the different specified performance tier, the memory address range may be assigned to the specified different performance tier.

A Key-Value (KV) storage device is disclosed. The KV storage device may include storage for objects, each object including data associated with a key. A host interface layer may receive requests to read data associated with a key from the storage, to write data associated with a key to the storage, and a boot request to get boot data from the storage. A boot request processor may process the boot request using the storage.

Various implementations described herein relate to systems and methods for managing metadata for an atomic write operation, including determining metadata for data, queuing the metadata in an atomic list, in response to determining that atomic commit has occurred, moving the metadata from the atomic list to write lookup lists based on logical information of the data, and determining one of metadata pages of a non-volatile memory for each of the write lookup lists based on the logical information.

Systems and methods are disclosed including a memory component and a processing device, coupled to the memory component. The processing device can program a block of the memory component using a first type of memory cells storing a first number of bits per memory cell. The processing device can then determine that an amount of memory used of the memory component is greater than a capacity threshold. Responsive to determining that a frequency of access to the block meets a criterion, the processing device can then program the block using a second type memory cells storing a second number of bits per memory cell, wherein the second number of bits exceeds the first number of bits.

A method of operating a storage device including a nonvolatile memory, the method including: generating virtual domains each of which including page mapping and block mapping tables; receiving a data input/output (I/O) request; performing a data I/O operation corresponding to the data I/O request using the virtual domains; transmitting a data I/O response to a host device in response to the data I/O request and the data I/O operation; and changing at least one of the virtual domains based on a direct request from the host device or a change in a first parameter associated with the data I/O request, and wherein, in response to the first parameter being changed, a second parameter associated with the data I/O response is changed by changing at least one of the virtual domains and by performing the data I/O operation using the changed virtual domain.

A memory controller and a storage device including the same are disclosed. A memory controller for controlling a nonvolatile memory includes: a security access control module configured to convert biometric authentication data received from a biometric module into security configuration data having a data format according to a security standard protocol and perform, based on the security configuration data, at least one of authority registration and authority authentication of a user authority set for an access control of a secure area of the nonvolatile memory, encrypted user data being stored in the secure area; and a data processing unit configured to, based on an access to the secure area being permitted, encrypt user data received from a host device or decrypt the encrypted user data read from the secure area.

Disclosed are a storage device including a memory controller and a method of operating the memory controller. A storage device according to the technical idea of the present disclosure includes a write buffer for storing write data that is not grouped into a transaction, a non-volatile memory device including a journal buffer where journal logs are stored, a volatile memory device for temporarily storing first metadata, and a memory controller for updating the first metadata to the second metadata based on the journal log stored after the start of the checkpoint among the journal logs stored in the journal buffer.