A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.

A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.

An adder adds a noise signal, an input signal, and a feedback signal. A threshold determination unit compares an addition signal output from the adder with a predetermined threshold, and outputs an ignition pulse signal. A transient response unit causes transient response of the ignition pulse signal, and generates an output signal. An intensity adjustment unit is formed of a variable resistor provided on a feedback loop, adjusts intensity of the feedback signal, and inputs the feedback signal to the adder.

An adder adds a noise signal, an input signal, and a feedback signal. A threshold determination unit compares an addition signal output from the adder with a predetermined threshold, and outputs an ignition pulse signal. A transient response unit causes transient response of the ignition pulse signal, and generates an output signal. An intensity adjustment unit is formed of a variable resistor provided on a feedback loop, adjusts intensity of the feedback signal, and inputs the feedback signal to the adder.

An integrated circuit and method are provided for performing weighted sum computations. The circuit includes: a plurality of current generators interconnected and arranged into pairs, a positive summation node, a negative summation node, and an input generation circuit. For each pair of current generators, the control terminal of each element is electrically connected to an input node. One of the current generators has its drain connected to the positive summation node while the other current generation element has its drain connected to the negative summation node. The remaining terminals on both current generators are connected to a reference, which may be shared. Each pair of current generator source predetermined amounts of current onto the two summation nodes when the following conditions occur: the input node is at an activation voltage, and the two summation nodes are at a predetermined target voltage.

Some embodiments include apparatuses having a first circuit portion, a second circuit portion, and a third circuit portion. The first circuit portion includes a first transistor to receive a first signal of a differential signal pair and a second transistor to receive a second signal of the differential signal pair. The second circuit portion is coupled to the first and second transistors and a first supply node, the second circuit portion including a first output node and a second output node to provide an output signal pair based on the differential signal pair. The third circuit portion includes a first diode-connected transistor coupled between the first output node and a second supply node and a second diode-connected transistor coupled between the second output node and the second supply node.

Some embodiments include apparatuses having a first circuit portion, a second circuit portion, and a third circuit portion. The first circuit portion includes a first transistor to receive a first signal of a differential signal pair and a second transistor to receive a second signal of the differential signal pair. The second circuit portion is coupled to the first and second transistors and a first supply node, the second circuit portion including a first output node and a second output node to provide an output signal pair based on the differential signal pair. The third circuit portion includes a first diode-connected transistor coupled between the first output node and a second supply node and a second diode-connected transistor coupled between the second output node and the second supply node.

An ultrasonic diagnostic apparatus includes an ultrasonic signal processing circuit including: a transmitter that selects a transmission transducer column from a plurality of transducers and transmits an ultrasonic beam to a target region; a receiver that generates a sequence of reception signals; a first phasing adder that generates a first acoustic beam signal by performing phasing addition on the sequence of reception signals; a parameter calculator that calculates a parameter for generating a subframe acoustic beam signal; a second phasing adder that generates a subframe acoustic beam signal; a synthesizer that generates a frame acoustic beam signal; a controller that determines whether to generate an ultrasonic image based on any one of the first acoustic beam signal and the frame acoustic beam signal; and an ultrasonic image generator that generates the ultrasonic image from any one of the first acoustic beam signal and the frame acoustic beam signal.

An ultrasonic diagnostic apparatus includes an ultrasonic signal processing circuit including: a transmitter that selects a transmission transducer column from a plurality of transducers and transmits an ultrasonic beam to a target region; a receiver that generates a sequence of reception signals; a first phasing adder that generates a first acoustic beam signal by performing phasing addition on the sequence of reception signals; a parameter calculator that calculates a parameter for generating a subframe acoustic beam signal; a second phasing adder that generates a subframe acoustic beam signal; a synthesizer that generates a frame acoustic beam signal; a controller that determines whether to generate an ultrasonic image based on any one of the first acoustic beam signal and the frame acoustic beam signal; and an ultrasonic image generator that generates the ultrasonic image from any one of the first acoustic beam signal and the frame acoustic beam signal.

A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.