The present disclosure provides systems and devices including reception circuits for communications between smart cards and card readers. In some embodiments, a reception circuit of a smart card includes a first circuit and a second circuit. The first circuit is configured to receive a wireless signal including a pause, and restore the wireless signal to a clock signal. The second circuit is configured to charge a voltage of a first node based on a first logic level of the clock signal, compare the voltage of the first node with a predefined reference voltage, and output, based on the comparison of the voltage of the first node, a synchronization signal indicating a rising starting time point of the pause of the wireless signal.

A multi-protocol RFID interrogating system employs a synchronization technique (step-lock) for a backscatter RFID system that allows simultaneous operation of closely spaced interrogators. The multi-protocol RFID interrogating system can communicate with backscatter transponders having different output protocols and with active transponders including: Title 21 compliant RFID backscatter transponders; IT2000 RFID backscatter transponders that provide an extended mode capability beyond Title 21; EGO RFID backscatter transponders, SEGO RFID backscatter transponders; ATA, ISO, ANSI AAR compliant RFID backscatter transponders; and IAG compliant active technology transponders. The system implements a step-lock operation, whereby adjacent interrogators are synchronized to ensure that all downlinks operate within the same time frame and all uplinks operate within the same time frame, to eliminate downlink on uplink interference.

A multi-protocol RFID interrogating system employs a synchronization technique (step-lock) for a backscatter RFID system that allows simultaneous operation of closely spaced interrogators. The multi-protocol RFID interrogating system can communicate with backscatter transponders having different output protocols and with active transponders including: Title 21 compliant RFID backscatter transponders; IT2000 RFID backscatter transponders that provide an extended mode capability beyond Title 21; EGO RFID backscatter transponders, SEGO RFID backscatter transponders; ATA, ISO, ANSI AAR compliant RFID backscatter transponders; and IAG compliant active technology transponders. The system implements a step-lock operation, whereby adjacent interrogators are synchronized to ensure that all downlinks operate within the same time frame and all uplinks operate within the same time frame, to eliminate downlink on uplink interference.

A payment terminal such as a payment reader may receive and form electrical connections with an electronic transaction card such as an EMV chip card. The payment terminal may provide a clock signal at a rate that exceeds a specified rate for the EMV chip card. The payment terminal may transmit messages to the EMV chip card and monitor receive messages at a data connection. The payment terminal may determine that the clock rate is excessive based on a timeout of a receive message, an error rate of a receive message, or a receive message indicating that one of the transmit messages was not received by the EMV card. The payment terminal may reduce the clock rate to a rate that is below the specified rate for the EMV chip card.

A payment terminal such as a payment reader may receive and form electrical connections with an electronic transaction card such as an EMV chip card. The payment terminal may provide a clock signal at a rate that exceeds a specified rate for the EMV chip card. The payment terminal may transmit messages to the EMV chip card and monitor receive messages at a data connection. The payment terminal may determine that the clock rate is excessive based on a timeout of a receive message, an error rate of a receive message, or a receive message indicating that one of the transmit messages was not received by the EMV card. The payment terminal may reduce the clock rate to a rate that is below the specified rate for the EMV chip card.

An RFID IC may operate at a relatively low clock frequency while impedance matching to an antenna is being tuned to increase the amount of power that the IC can extract from an incident RF wave. A tuning circuit tunes the impedance matching by adjusting a variable impedance coupling the IC and the antenna. The IC may power-up with a low clock frequency or reduce its current clock frequency to a lower clock frequency prior to tuning or during the tuning process, and may increase its clock frequency upon completion of tuning or during the tuning process.

An RFID IC may operate at a relatively low clock frequency while impedance matching to an antenna is being tuned to increase the amount of power that the IC can extract from an incident RF wave. A tuning circuit tunes the impedance matching by adjusting a variable impedance coupling the IC and the antenna. The IC may power-up with a low clock frequency or reduce its current clock frequency to a lower clock frequency prior to tuning or during the tuning process, and may increase its clock frequency upon completion of tuning or during the tuning process.

A method includes receiving image information related to a first plurality of pixels at a first data pathway, receiving image information related to a second plurality of pixels at a second data pathway, where the first plurality of pixels and the second plurality of pixels include a shared plurality of pixels. The method also includes performing image processing in dependence on image information related to the shared plurality of pixels, and combining data output from the first and second data pathways into a stream of data where the stream output is generated using a first clock frequency which is substantially the same as that used in the first and second data pathways.

Approaches for synchronising electronic animal identification tag readers for reading electronic animal identification tags attached to animals Embodiments include using a pulse from a GNSS receiver, adjusting for an error between a reference cadence signal and a local cadence signal, and using a synchronisation signal.

A multi-protocol RFID interrogating system employs a synchronization technique (step-lock) for a backscatter RFID system that allows simultaneous operation of closely spaced interrogators. The multi-protocol RFID interrogating system can communicate with backscatter transponders having different output protocols and with active transponders including: Title 21 compliant RFID backscatter transponders; IT2000 RFID backscatter transponders that provide an extended mode capability beyond Title 21; EGOTM RFID backscatter transponders, SEGOTM RFID backscatter transponders; ATA, ISO, ANSI AAR compliant RFID backscatter transponders; and IAG compliant active technology transponders. The system implements a step-lock operation, whereby adjacent interrogators are synchronized to ensure that all downlinks operate within the same time frame and all uplinks operate within the same time frame, to eliminate downlink on uplink interference.