A memory controller performs DMA operations on arbitrary sized elements unbounded by the word size of the host memory or processor, which performs operations based on an element that represents an atomic data unit such as a pixel. In this manner, a corresponding coding effort is not concerned with computing and locating word boundaries and accommodating unused bits of data conventionally used for accommodating word boundaries on pixel data for video rendering, for example. An element in memory corresponds to a rendered atomic data item, such as a pixel. The controller determines an element precision indicative of a size of the element, and identifies a unit of memory based on a memory location and a packed representation of a plurality of the elements relative to the memory location. The unit has a height and width, defining elements arranged in a grid, and an element position is based on coordinates.

A memory controller performs DMA operations on arbitrary sized elements unbounded by the word size of the host memory or processor, which performs operations based on an element that represents an atomic data unit such as a pixel. In this manner, a corresponding coding effort is not concerned with computing and locating word boundaries and accommodating unused bits of data conventionally used for accommodating word boundaries on pixel data for video rendering, for example. An element in memory corresponds to a rendered atomic data item, such as a pixel. The controller determines an element precision indicative of a size of the element, and identifies a unit of memory based on a memory location and a packed representation of a plurality of the elements relative to the memory location. The unit has a height and width, defining elements arranged in a grid, and an element position is based on coordinates.

A data storage device to be coupled to a display device including a display unit including a plurality of blocks, each including a plurality of pixels, the data storage device including: a memory device to store a first address value and a second address value including information on a position of one of the plurality of blocks, store a first indication value to be utilized to determine whether the first address value is effective and a second indication value to be utilized to determine whether the second address value is effective, and store compensation data including information on the blocks; an effective address determinator to determine whether the first address value and the second address value are effective corresponding to the first indication value and the second indication value; and an updater to update the first and second indication values, the first and second address values, and the compensation data.

A system and method for recursively rendering, caching, and/or retrieving a display object bitmap is provided. In some implementations, an image may be rendered on a client computing platform using an image list of one or more bitmap objects. The one or more object bitmaps may be generated in response to obtaining information defining a vector image in an image frame in an animation. An image list may be maintained for an image to be rendered based on the vector image of a frame of animation and/or some or all of the frames in the animation. The image list may store one or more references to one or more respective bitmap objects that are associated with the image to be rendered.

An apparatus for Gaussian filtering includes an image buffer for generating mask region data which includes pixel values of pixels located on a mask in an input image, and a Gaussian filter core for arranging the mask region data to generate pixel array values referring to an index array corresponding to a size of the mask, and applying Gaussian filtering to the pixel array values to generate Gaussian filtering values.

An apparatus for Gaussian filtering includes an image buffer for generating mask region data which includes pixel values of pixels located on a mask in an input image, and a Gaussian filter core for arranging the mask region data to generate pixel array values referring to an index array corresponding to a size of the mask, and applying Gaussian filtering to the pixel array values to generate Gaussian filtering values.

Disclosed herein are system, method, and computer program product embodiments for modifying graphics rendering by transcoding a serialized command stream. An embodiment operates by receiving a command configured to instruct an API to render a graphics element. The embodiment further operates by generating, based on the command, a transcoded command configured to instruct the API to render a modified graphics element by applying a set of modification factors to a portion of the command. Subsequently, the embodiment operates by transmitting the transcoded command to the API.

Disclosed herein are system, method, and computer program product embodiments for modifying graphics rendering by transcoding a serialized command stream. An embodiment operates by receiving a command configured to instruct an API to render a graphics element. The embodiment further operates by generating, based on the command, a transcoded command configured to instruct the API to render a modified graphics element by applying a set of modification factors to a portion of the command. Subsequently, the embodiment operates by transmitting the transcoded command to the API.

A method of encoding a block of an array of data elements comprises selectively writing out an encoded version of the block either that is encoded using a first encoding scheme, which provides encoded blocks of non-fixed data size, or that is encoded using a second encoding scheme, which provides encoded blocks of fixed data size. The selection of which version of the encoded block to write out is based on the size of the encoded block when encoded using the first encoding scheme. This provides the potential for the encoded block that is written out to be compressed in a more superior manner using the first encoding scheme where possible, whilst also providing an encoded block that has a predictable maximum compressed size.

According to one embodiment, a signal supply circuit used for a display device includes a plurality of subpixels each including a memory. The signal supply circuit includes a first mode. The first mode receives first video data in a unit of n bits corresponding to the subpixels from outside, and supplies digital data for the subpixels in a unit of m bits less than n bits to the subpixels based on the first video data.