An electronic device includes a camera and a display screen located above the camera. A display output area of the display screen includes a first area corresponding to image collection areas of the camera and a second area not overlapping with the first area. The display screen includes a sharing pixel corresponding to the first area and a shared pixel, the sharing pixel including at least three sub-pixels. Each sub-pixel of the at least three sub-pixels of the sharing pixel is commonly controlled based on a first control signal of a driving sub-circuit in a driving circuit of the shared pixel, and individually controlled based on a second control signal.

A display device includes: a pixel unit including first pixels disposed in a first pixel area and second pixels disposed in a second pixel area; an image data corrector adjusting a limit grayscale of first image data corresponding to the first pixel area based on a dimming level defining a maximum luminance at which the pixel unit is able to emit light, and correcting the first image data based on the limit grayscale; a data driver supplying data signals to the pixel unit based on the corrected first image data and second image data corresponding to the second pixel area; and a scan driver supplying scan signals to the pixel unit.

A display device includes a substrate having a pixel area with at least a first rounded corner portion and first to third non-pixel areas arranged sequentially along an outer circumference of the pixel area. An internal circuit in the first non-pixel area has a first end portion adjacent to the first rounded corner portion of the pixel area. The first end portion of the internal circuit is rounded in accordance with the first rounded corner portion. A plurality of routing wires are in the third non-pixel area below the pixel area. The routing wires extending to the pixel area via the second non-pixel area and the first non-pixel area. The routing wires include at least a first routing wire connected to the pixel area passing an area of the first end portion of the internal circuit.

A display device includes a first pixel area having first pixels and a second pixel area having second pixels. Each first pixel includes a driving transistor initialized to a voltage of a first initialization power supply. Each second pixel includes a driving transistor initialized to a voltage of a second initialization power supply. The first initialization power supply and the second initialization power supply are set to different voltages. The first pixel area and the second pixel area have different widths.

A pixel includes an organic light emitting diode that includes first and second terminals. A driving transistor generates a driving current, and includes a first terminal for a first power supply voltage, a second terminal connected to the first terminal of the organic light emitting diode, and a gate terminal for an initialization voltage. The first switching transistor includes a first terminal connected to a first node, a second terminal connected to the gate terminal of the driving transistor, and a gate terminal for a data initialization gate signal. The second switching transistor includes a first terminal for the initialization voltage, a second terminal connected to the first node, a first gate terminal for the data initialization gate signal, and a second gate terminal for a light emitting element initialization signal. The first terminal of the organic light emitting diode is connected to the first node.

A display panel, a method of driving a display panel, and a display device are provided. The display panel includes a plurality of sub-pixel units arranged in an array, a plurality of compensation driving circuits and a plurality of light emitting control lines; sub-pixel units in each row are divided into a plurality of compensation light emitting groups, the plurality of compensation light emitting groups include a plurality of first compensation light emitting groups, the first compensation light emitting groups each include N sub-pixel units that are adjacent, and light emitting circuits of the N sub-pixel units that are adjacent are connected to one same compensation driving circuit; the light emitting circuits of the N sub-pixel units that are adjacent of each of the first compensation light emitting groups are respectively connected to N light emitting control lines that are different.

Disclosed are a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes: a driving substrate, a first electrode, an auxiliary electrode, a pixel definition layer and a hole injection layer. The driving substrate includes a driving circuit and a dielectric layer covering the driving circuit; the first electrode and the auxiliary electrode are on a side of the dielectric layer of the driving substrate away from the driving circuit; the auxiliary electrode at least partially surrounds the first electrode; the pixel definition layer is on a side of the first electrode and the auxiliary electrode away from the driving substrate; the pixel definition layer includes a pixel opening, and the first electrode is at least partially exposed through the pixel opening and is electrically connected to the driving circuit; and the hole injection layer is in the pixel opening and stacked with the first electrode.

A display panel includes an active area including pixels arranged along a first direction and a second direction intersecting each other and data lines and gate lines arranged to be intersected; and shift registers supplying a gate pulse to each of the gate lines, wherein each of the shift registers includes GIP circuit portions dispersedly disposed in the active area; and GIP lines supplying a predetermined signal to the GIP circuit portions or connecting the GIP circuit portions with each other, the GIP lines being located between neighboring pixels along the second direction.

Embodiments relate to a display device with reduced scanning time by using a reference line separate from a data line to improve frame rate of the display device. A first pixel in a first row samples a reference voltage during a first period and samples a data voltage during a second period. A second pixel in a second row adjacent to the first row samples the reference voltage during a third period and samples the data voltage during a fourth period, where the third period overlaps with at least a portion of the second period. The reference voltage is provided by the reference line that is connected to a reference buffer, and the data voltage is provided by the data line connected to a source driver circuit.

To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10.sup.−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.