A pixel circuit, a method of driving a pixel circuit and a display panel. The pixel circuit (10) includes: a drive circuit (100), a data writing circuit (200), a compensation circuit (300), and a light emitting element (500). The drive circuit (100) includes a control terminal (130), a first terminal (110) and a second terminal (120), and is configured to control a drive current flowing through the first terminal (110) and the second terminal (120) for driving the light emitting element (500) to emit light. The data writing circuit (200) is configured to write a data signal to a first terminal (110) of the drive circuit (100) in response to a first scanning signal. The compensation circuit (300) is configured to store a data signal written by the data writing circuit (200) and compensate the drive circuit (100) in response to a second scanning signal. A first terminal (510) of the light emitting element (500) is configured to receive a drive current, and a second terminal (520) of the light emitting element (500) is connected to a second voltage terminal (VSS). The pixel circuit may realize a low-frequency driving.

An organic light-emitting diode (OLED) display panel and an OLED display device have a display region and a non-display region surrounding the display region. The non-display region includes a bonding region, a first fan-out line region, a bending region, and a second fan-out line region. A bonding test region is arranged between the bonding region and the first fan-out line region, a bonding test circuit is arranged in the bonding test region, and the bonding test circuit is used to detect whether a fan-out data line passing through the bonding region is abnormal.

Disclosed is a driving method for display unit, a display panel and a display device, a reset circuit is formed by a reset signal, a charging circuit is formed by a charging signal, and a light emitting circuit is formed by a light emitting signal, that is, the circuit in the display device is multiplexed by each control signal, so that it does not need to design a circuit for each function to realize the driving of the display unit, solving the complex problem of driving the display unit in the relevant technology.

Disclosed are a driving method including: acquiring a first preset scanning driving signal, a second preset scanning driving signal and a preset data driving signal, and shortening the driving time of the second preset scanning driving signal so as to shorten the driving time of the second preset scanning driving signal compared to the driving time of the preset data driving signal. The even-numbered column pixels in the first row and the odd-numbered column pixels in the second row in the driving period are driven by a first preset scanning driving signal, and the odd-numbered column pixels in the first row and the even-numbered column pixels in the second row in the driving period are driven by a second preset scanning driving signal.

Embodiments of the present disclosure relate to a touch display device, a gate driving circuit and a touch driving method, and more particularly may provide a touch display device comprising a display panel on which a plurality of subpixels are disposed; a gate driving circuit supplying a plurality of scan signals to the display panel through a plurality of gate lines; a touch driving circuit supplying a plurality of touch driving signals to the display panel through a plurality of touch lines and receiving a plurality of touch sensing signals generated by the display panel; and a timing controller controlling the touch driving circuit and controlling a plurality of driving modes by supplying a touch control signal for determining a display driving period and a touch driving period to the gate driving circuit.

Disclosed is an array substrate. The array substrate includes a substrate and a pixel unit array. A first side of each row of pixel units is provided with a first scanning line corresponding to the row of pixel units, and the first scanning line is connected to switch elements of first-type pixel units in the row of pixel units; and the second side of each row of pixel units is provided with a second scanning line corresponding to the row of pixel units, and the second scanning line is connected to switch elements of second-type pixel units in the row of pixel units. An active layer structure of the switch element of a second-type pixel unit in an i.sup.th row of pixel units has a common region with an active layer structure of the switch element of a first-type pixel unit in an (i+1).sup.th row of pixel units.

Provided is an organic light-emitting display panel. Pixel-driving circuits of subpixels in a same row of pixel units are connected to a same light emission control signal line. The pixel-driving circuits of the subpixels in the same row of pixel units are connected to a same reset control signal line; and an anode of a light-emitting element of each of the subpixels to which the pixel-driving circuits electrically connected to the reset control signal line belong is at a reset voltage. In a display period of each frame of image, in at least part of a period during which an i-th row of pixel units are in a light emission stage, anodes of light-emitting elements of a j-th row of pixel units are at a reset voltage; and the j-th row of pixel units and the i-th row of pixel units are adjacent two rows of pixel units.

A scan driver circuit for an active matrix array includes a plurality of stages and a plurality of decoders that are sequentially driven at different driving timings in a same stage based on a combination of the plural decoder signals or that are driven at the same timing in different stages where a last decoder of the plural decoders sequentially outputs a scan line signal according to a driving state of the plural decoders in each of plural stages, each of the plural decoders includes an input part, an output part and a reset part, and the input part includes a first decoding transistor, a fourth decoding transistor connected to a clock signal and second, third, fifth and sixth decoding transistors connected in series to each of the first decoding transistor and the fourth decoding transistor and connected to the plural decoder signals.

A control method for charging time sharing in a display apparatus, which includes receiving image data including a plurality of pixel data signals corresponding to a plurality of display driving periods, each display driving period associated with pixel data signals of a respective row of the display apparatus, calculating a plurality of gray variations corresponding to the plurality of display driving periods according to the plurality of pixel data signals, adjusting the plurality of display driving periods to generate a plurality of adjusted display driving periods according to the plurality of gray variations, and generating a gate clock signal according to the plurality of adjusted display driving periods.

A DA conversion circuit includes a first DA conversion circuit unit corresponding to a higher bit, a second DA conversion circuit unit corresponding to a lower bit, a capacitance element provided between the first DA conversion circuit unit and the second DA conversion circuit unit, the first DA conversion circuit unit includes a capacitance element and a selection circuit, the second DA conversion circuit unit includes a capacitance element and a selection circuit, and the selection circuit supplies a potential VL or VPH to one end of the capacitance element, and the selection circuit supplies the potential VL or VPL to one end of the capacitance element. The potential VPL is different from the potential VPH, and for example, VPL>VPH.