Patent classifications
G09G2310/0224
DISPLAY CLOCK SIGNALING WITH REDUCED POWER CONSUMPTION
A display can include a plurality of pixels arranged in a matrix of rows and columns, and a gate driver circuit including a plurality of row drivers configured as a shift register that sequentially and individually addresses the rows. The display panel can also include a first clock circuit configured to provide a first set of clock signals to a first portion of the row drivers to address a respective first portion of the rows. The first clock circuit can include a signal distribution circuit having a first input impedance. The display panel can also include a second clock circuit configured to provide a second set of clock signals to a second portion of the row drivers to address a respective second portion of the rows. The second clock circuit can include a signal distribution circuit having a second input impedance that is matched with the first input impedance.
Driving method and apparatus of display panel
The present disclosure discloses a driving method and apparatus of a display panel. When each of a plurality of obtained display frames is transmitted, only display data, corresponding to each pixel in one row group, in the display frame of image data is transmitted to a driving chip in the display panel, so that the driving chip in the display panel drives the display panel to display an image according to the received display data. Therefore, when a system on chip transmits each of the plurality of obtained display frames, only the display data, corresponding to each pixel in one row group, in the display frame of image data is transmitted to the driving chip in the display panel.
Method of driving display, and display device
Embodiments of the present disclosure provide a method of driving display, and a display device. The method of driving display includes: scanning, progressively or rows by rows, a plurality of sub-pixels arranged in an N×M array, to turn on each row of sub-pixels scanned, so that a duration in which two adjacent rows of sub-pixels are simultaneously in an ON state is greater than or equal to two times a unit scanning time, wherein the unit scanning time is a time required for scanning a row of sub-pixels, N is an integer greater than 1, and M is an integer greater than 1; and applying data signals to at least two rows of sub-pixels simultaneously in the ON state, so that a duration of applying the data signals to each row of sub-pixels is greater than the unit scanning time.
Rotating display
A rotating display, for creating a three-dimensional image, that includes a display panel configured to rotate about an axis and comprising a plurality of groups of light emitting elements, with each element being individually controllable and configured to display a plurality of pixels of the image, a processor to receive pixel data for the display panel and divide the data into a plurality of pixel data lines, each line comprising pixel data for only one of the groups of light emitting elements, a buffer to receive one or more of the data lines, for each group of light emitting elements, and a demultiplexer configured to receive a pixel data line and provide pixel data to each light emitting element according to a refresh rate of the display panel. The display panel is configured to rotate about the axis at a rate commensurate with the refresh rate of the display panel.
DISPLAY DEVICE
A display panel includes a display panel displaying an image including a moving image and a static image; a controller generating first image data to the first area in a first arrangement type, and generating second image data to the second area in a second arrangement type; a scan driver sequentially supplying scan signals to all of pixel rows of the first area during a first period of a first frame and sequentially supplying scan signals to a part of pixel rows of the second area exclusively during a second period of the first frame; and a data driver supplying data signals corresponding to the first image data to data lines during the first period, and supplying data signals corresponding to the second image data to the data lines during the second period.
Data driving circuit, controller and display device for reducing load of circuits during high-speed driving
Embodiments of the present disclosure relate to a data driving circuit, a controller and a display device. A display driving is performed by outputting the number of internal data enable signals that is smaller than the number of external data enable signals in the display device performing high-speed driving. As a result, it is possible to prevent an increase in the load of the data driving circuit according to the high-speed driving. In addition, a part of the internal data enable signals is output during a blank period to prevent a decrease in the interval between the internal data enable signals and to increase the number of internal data enable signals. This can improve the image quality displayed on the display panel while preventing an increase in the load on the data driving circuit.
Display system
Eye-friendly display that can reduce eye strain on a user is achieved. A display system includes a display portion, an input portion, and a control portion. The display portion is configured to display an image. The input portion is configured to sense an input from a user and output a signal to the control portion. The control portion is configured to execute a first mode and a second mode. In the first mode executed by the control portion, an image is displayed on the display portion by an interlace method. In the second mode executed by the control portion, an image is displayed on the display portion by a progressive method. The control portion is configured to switch between the first mode and the second mode in accordance with the signal.
Display driver circuitry with balanced stress
A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver circuit may include multiple gate line driver segments each of which is activated by a separate gate start pulse is that received through a demultiplexing circuit. In another suitable embodiment, the gate driver circuit may include analog or digital gate driver units that include control circuits for selectively (dis)charging internal nodes in the gate driver circuit so as to balance the amount of stress that is experienced by a drive transistor in gate driver units at or near an IFP row and the amount of stress that is experienced by the remaining gate driver units.
DISPLAY DRIVING METHOD AND DISPLAY DEVICE
A display driving method and a display device. The display driving method includes: scanning a plurality of subpixels arranged in an N×M array one row by one row or multiple rows by multiple rows to turn on each row of scanned subpixels, so that two adjacent rows of sub-pixels are simultaneously in an on-state for a duration greater than or equal to twice a unit scanning time, the unit scanning time is a time required to scan one row of sub-pixels, wherein N and M are both integers greater than 1; applying data signals to at least two rows of sub-pixels that are simultaneously in the on-state, such that at least a portion of rows of sub-pixels are applied with data signals for a duration greater than the unit scanning time.
Gate driving circuit and display device
A gate driving circuit includes a first type of stage circuit for outputting a first gate signal and a second type of stage circuit for outputting a second gate signal, and further including a bias transistor for supplying, when turned-on, a bias voltage to a shield metal positioned to overlap with a semiconductor layer of a specific transistor among a plurality of transistors included in the first type of stage circuit, thereby preventing a leakage current from occurring inside the gate driving circuit.