A display device includes a plurality of pixels connected to a plurality of first scan lines, a plurality of second scan lines, and a plurality of data lines, where the pixels are arranged in a plurality of rows, a plurality of first stages connected to the first scan lines, a plurality of second stages connected to the second scan lines, and a data driver connected to the data lines. Each of the first scan lines is connected to pixels arranged in a corresponding row among the rows. Each of the second scan lines is commonly connected to pixels arranged in corresponding 8h rows among the plurality of rows, where h is a natural number.

A display device includes a controller, a panel driver, and a voltage generator. The controller generates a first control signal and generates image data and a second control signal in response to first and second image signals. The panel driver generates a driving signal in response to the image data and the first control signal to drive a display panel. The voltage generator generates a driving voltage to drive the display panel and changes a voltage level of the driving voltage in response to the second control signal. The first image signal corresponds to a second frame located before a third frame in which the driving voltage is changed. The second image signal corresponds to a first frame located before the second frame. The controller generates image data corresponding to the second frame in response to the first image signal and the second image signal.

An interface device includes an electronic device and an input device for communicating with the electronic device, wherein the electronic device includes a display layer, a sensor layer which is disposed on the display layer and senses a first input by the input device, a display driving unit for generating a vertical synchronization signal for driving the display layer, and a control unit for controlling the sensor layer, wherein the control unit outputs, in synchronization with a first vertical synchronization signal, a first uplink signal to the sensor layer and outputs, in synchronization with a second vertical synchronization signal, a second uplink signal having a phase different from a phase of the first uplink signal to the sensor layer.

A light-emitting device, a display module, and a driving method thereof are disclosed. The light-emitting device including a data input, a data output, a plurality of light units, and a driving circuit. The data input is configured to receive an input data. The data output is adapted to be connected in series to a data input of another light-emitting device. The driving circuit is coupled to the data input, the data output, and the plurality of light units. The driving circuit statically drives the plurality of light units according to the input data, and generates an output data according to the input data and transmits the output data to the data output. The display module includes the light-emitting device and a control circuit.

A display panel and a display device are provided. The display panel includes a pixel circuit, a driving circuit configured to provide a control signal for the pixel circuit, and a clock signal line configured to provide a clock signal for the driving circuit. A data refresh period of the pixel circuit includes a data writing stage and a holding stage, the holding stage includes N stage arranged in sequence and N>1. When the pixel circuit is operated in the data writing stage, the clock pulse frequency of the clock signal is a first frequency F1; when the pixel circuit is operated in the holding stage, in at least one of the N stages, the clock pulse frequency of the clock signal is a second frequency F2; and F1>F2>0.

The present disclosure describes a display panel and a circuit to generate a data signal current included thereof. The circuit further comprises a signal voltage module to generate a primary signal voltage and send to a second storage capacitor in a control module to output a data signal voltage. The second storage capacitor is coupled to a first storage capacitor and a gate of a current output transistor, so that the primary signal voltage is stored at the joint node. A threshold voltage of the current output transistor, generated by a voltage compensation module, is then added on to the gate of the current output transistor, so that an output current compensated by the threshold voltage is realized.

In a display system, a display device includes a plurality of gate lines, a plurality of source lines and a plurality of common electrodes used for both image display and touch detection. A first acquirer acquires a specific frequency to be avoided. A second acquirer acquires a frequency of a control signal used to control the display device. When the specific frequency and the frequency of the control signal satisfy a changing condition, a changing unit changes the frequency of the control signal.

An output buffer is disclosed that includes: a buffer circuit that outputs an output signal to an output terminal based on a first input signal provided to a first input terminal and a second input signal provided to a second input terminal; and a current supply circuit that is connected in parallel to the buffer circuit, and provides an auxiliary current to the output terminal based on the first input signal and the second input signal.

A pixel circuit comprises a light emission element; a driving transistor including a first electrode connected to the first node, a second electrode connected to a second node, and a gate electrode connected to a third node; a first transistor including a first electrode receiving a third voltage, a second electrode connected to the first node, and a gate electrode receiving a second light emission control signal; a first transistor including a first electrode connected to a first line transferring a first power voltage, a second electrode connected to the second node, and a gate electrode receiving a first light emission control signal; a first storage capacitor connected between the third node and a fourth node; and a switching transistor including a first electrode connected to a data line, a second electrode connected to the fourth node, and a gate electrode receiving a scan signal.

A display driver includes image processing circuitry and drive circuitry. The image processing circuitry is configured to generate first voltage data for a first pixel in a first screen area of a display panel using a first gamma parameter. The image processing circuitry is further configured to generate second voltage data for a second pixel in a second screen area of the display panel using a second gamma parameter set. The image processing circuitry is further configured to determine an interpolated gamma parameter set for a third pixel in a connection area of the display panel through interpolation between the first gamma parameter set and the second gamma parameter set. The connection area is disposed between the first screen area and the second screen area. The image processing circuitry is further configured to generate third voltage data for the third pixel using the interpolated gamma parameter set.