Disclosed are a pixel circuit and a display device including the same. The pixel circuit includes a driving element including a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node; a first switch element including a first electrode connected to a fourth node, a gate electrode to which a scan pulse is applied, and a second electrode connected to the first node, and configured to be turned on according to a gate-on voltage of the scan pulse while a threshold voltage of the driving element is sensed; and a first capacitor connected between the second node and the fourth node.

Embodiments of the disclosure relate to a display device and a data driving circuit. The display device comprises a display panel including a plurality of subpixels and a plurality of data lines electrically connected with the plurality of subpixels and a data driving circuit outputting a data voltage to the plurality of data lines, wherein the data driving circuit outputs the data voltage for image display to the plurality of data lines during an active period and outputs a step voltage to stepwise decrease a level of the data voltage to a preset target voltage level or stepwise increase the level of the data voltage from the target voltage level during a blank period different from the active period. Specifically, there may be provided a display device and a data driving circuit capable of enhancing display quality in a dark mura area and a bright mura area by outputting a step voltage to stepwise decrease the level of a data voltage to a preset target voltage level or stepwise increase the level of the data voltage from the target voltage level during a blank period.

A pixel circuit, a method for driving a pixel circuit and a display device. The pixel circuit includes a driving element including a first electrode connected to a first node, a first gate electrode connected to a second node, a second electrode connected to a third node, and a second gate electrode to which a preset voltage is applied; a light emitting element including an anode electrode connected to a fourth node and a cathode electrode to which a low-potential power supply voltage is applied, the light emitting element being driven according to a current from the driving element; a first switch element connected between the first node and the second node; and a second switch element connected between the third node and the fourth node.

A pixel circuit, a display panel, a display device, and a driving method. The pixel circuit includes a light emitting element, a driving transistor, a light emitting control circuit, a reset circuit, a threshold compensation circuit, a first data write circuit, and an initializing circuit. The reset circuit includes a first transistor, the first data write circuit includes a third transistor, and a channel length-width ratio of the first transistor is greater than a channel length-width ratio of the third transistor.

A pixel circuit, a method of driving a pixel circuit and a display panel. The pixel circuit (10) includes: a drive circuit (100), a data writing circuit (200), a compensation circuit (300), and a light emitting element (500). The drive circuit (100) includes a control terminal (130), a first terminal (110) and a second terminal (120), and is configured to control a drive current flowing through the first terminal (110) and the second terminal (120) for driving the light emitting element (500) to emit light. The data writing circuit (200) is configured to write a data signal to a first terminal (110) of the drive circuit (100) in response to a first scanning signal. The compensation circuit (300) is configured to store a data signal written by the data writing circuit (200) and compensate the drive circuit (100) in response to a second scanning signal. A first terminal (510) of the light emitting element (500) is configured to receive a drive current, and a second terminal (520) of the light emitting element (500) is connected to a second voltage terminal (VSS). The pixel circuit may realize a low-frequency driving.

A pixel circuit and a display panel are disclosed. The pixel circuit includes a first and a second power supply lines, a light-emitting element, a driving TFT, a storage capacitor, a writing TFT, a first, a second, and a third compensation TFTs. The storage capacitor is electrically connected to the driving TFT, the writing TFT is electrically connected to the driving TFT, the first compensation TFT is electrically connected to the driving TFT, the storage capacitor, and the driving TFT, the second compensation TFT is electrically connected to the storage capacitor and the first compensation TFT, the third compensation TFT is electrically connected to the storage capacitor, and the third compensation TFT is electrically connected to the light-emitting element.

The embodiments of the application discloses a driving circuit, a display panel, a display apparatus and a voltage stabilization control method. The driving circuit includes an input module, a control module, an output module and a voltage stabilization module. The output module is used to output a scan signal via the output module according to level states of signals at first and second nodes. With respect to the voltage stabilization module, an input terminal thereof is connected to the output terminal of the output module, a first control terminal thereof receives a second clock signal, a second control terminal thereof is connected to the second node, an output terminal thereof is connected to the first node, and the voltage stabilization module is to connect the output terminal of the output module to the first node, when the scan signal is to control a data writing transistor to be turned off.

A display device comprises: pixels connected to a power line to which a pixel driving voltage is supplied; data lines that extend in a first direction and are connected to the pixels, the data lines applying data voltages of an image to the pixels; gate lines that are connected to the pixels and extend in a second direction, the gate lines applying gate signals to the pixels; a data driver configured to supply the data voltages to the data lines during a display mode, and to supply sensing data to the data lines during a sensing mode; a gate driver configured to supply the gate signals to the gate lines; and a sensing circuit configured to sense current flowing through the power line that is connected to a subset of pixels from the pixels during the sensing mode, the subset of pixels arranged along the first direction.

A display device includes: a first pixel including a first light emitting diode (LED) and a first capacitor including a first electrode connected to a first power source voltage providing a driving voltage to an anode of the first light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the first light emitting diode (LED); and a second pixel including a second light emitting diode (LED) and a second capacitor including a first electrode connected to the first power source voltage providing the driving voltage to an anode of the second light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the second light emitting diode (LED), wherein capacitance of the second capacitor is less than capacitance of the first capacitor.

Disclosed is a display device, which includes a display panel including a plurality of pixels, and one of the plurality of pixels includes a light emitting device connected to a first reference node and that emits light, a driving transistor connected between a power supply line receiving a power supply voltage and the first reference node, a scan transistor connected between a data line receiving a data signal and the driving transistor and that receives a scan signal, a first capacitor connected between the first reference node and a second reference node, a shared transistor connected between the first reference node and the second reference node and that receives a shared control signal, and the first capacitor and the shared transistor are connected in series between the first reference node and the second reference node, and a control electrode of the driving transistor is connected to the second reference node.